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935313028518 PDF预览

935313028518

更新时间: 2024-09-26 19:51:15
品牌 Logo 应用领域
恩智浦 - NXP 时钟微控制器外围集成电路
页数 文件大小 规格书
133页 1493K
描述
RISC Microcontroller

935313028518 技术参数

生命周期:Active包装说明:LFBGA,
Reach Compliance Code:unknown风险等级:5.74
具有ADC:YES地址总线宽度:
位大小:32最大时钟频率:32 MHz
DMA 通道:YES外部数据总线宽度:
长度:8 mmI/O 线路数量:85
端子数量:121PWM 通道:YES
封装代码:LFBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH速度:72 MHz
最大供电电压:3.6 V最小供电电压:1.71 V
标称供电电压:3.3 V表面贴装:YES
端子形式:BALL端子节距:0.65 mm
端子位置:BOTTOM宽度:8 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

935313028518 数据手册

 浏览型号935313028518的Datasheet PDF文件第2页浏览型号935313028518的Datasheet PDF文件第3页浏览型号935313028518的Datasheet PDF文件第4页浏览型号935313028518的Datasheet PDF文件第5页浏览型号935313028518的Datasheet PDF文件第6页浏览型号935313028518的Datasheet PDF文件第7页 
NXP Semiconductors  
Data Sheet: Technical Data  
Document Number: KL82P121M72SF0  
Rev. 4, 12/2016  
Kinetis KL82 Microcontroller  
MKL82Z128Vxx7(R)  
72 MHz ARM® Cortex®-M0+ with 128 KB Flash and 96 KB  
SRAM  
The KL82 MCU family's high performance, encryption features  
and ultra-low power capabilities extend its reach beyond  
traditional mPOS pin pads and terminals into more power-  
restricted payment applications, such as smartphone and tablet  
attach readers, as well as those embedded in wearable  
technology.  
100 & 80 & 64 LQFP  
(LL&LK&LH)  
14x14 x1.7 mm Pitch  
121 & 64 MAPBGA  
(MC&MP)  
8x8x1.43 mm Pitch 0.5mm 12x12x1.6 mm  
0.65 mm 5x5x1.23 mm  
Pitch 0.5 mm  
Pitch 0.5 mm  
10x10x1.6 mm Pitch  
0.5 mm  
The product offers:  
• Hardware asymmetric cryptography – high-speed, code-  
and power-efficient data authentication with support for  
latest encryption protocols  
• EMV®-compatible with ISO7816-3 SIM interfaces – architected for EMV compliance and supported by  
an EMV Level 1 software stack  
• QSPI interface to expand program memory  
• Sleep mode power consumption from 2.5 µA with the SRAM content retained and RTC enabled  
• Crystal-less USB OTG controller, 16-bit ADC and multiple serial communication interfaces can all  
function autonomously in low-power modes with minimal CPU intervention  
• FlexIO to support any standard and customized serial peripheral emulation  
Core Processor  
Peripherals  
• USB full-speed 2.0 OTG controller supporting  
• 72 MHz ARM® Cortex®-M0+ core ( up to 96 MHz for high-  
speed run)  
crystal-less operation and keeping connection  
alive under ultra-low power  
Memories  
• Three low-power UART modules supporting  
asynchronous operation in low-power modes  
• Two I2C modules supporting up to 1 Mbps  
• Two 16-bit SPI modules supporting up to  
24Mbps  
• 128 KB program flash memory  
• 96 KB SRAM  
• 32 KB ROM with built-in boot loader  
• 32 B backup register  
• QSPI to expand program code in external high-speed serial  
NOR flash memory  
• One FlexIO module supporting emulation of  
additional UART, SPI, I2C, I2S, PWM and  
other serial modules, etc. up to 32 channels  
• One 16-bit ADC module with high accurate  
internal voltage reference and up to 16  
channels  
System  
• 8-channel asynchronous enhanced DMA controller  
• Watchdog  
• Low-leakage wakeup unit  
• Two-pin serial wire debug (SWD) programming and  
debugging interface  
• Micro trace buffer  
• Bit manipulation engine  
• Interrupt controller  
• High-speed analog comparator containing a 6-  
bit DAC for programmable reference input  
• One 12-bit DAC module  
• Two EMVSIM modules supporting EMV L1  
compatible interface  
• Touch sensing interface up to 16 channels  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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