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935282714118 PDF预览

935282714118

更新时间: 2024-11-21 20:10:35
品牌 Logo 应用领域
恩智浦 - NXP 外围集成电路
页数 文件大小 规格书
28页 161K
描述
8 I/O, PIA-GENERAL PURPOSE, PQCC16

935282714118 技术参数

生命周期:Active包装说明:HVQFN-16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
JESD-30 代码:S-PQCC-N16长度:3 mm
I/O 线路数量:8端口数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:1 mm
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:3 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

935282714118 数据手册

 浏览型号935282714118的Datasheet PDF文件第2页浏览型号935282714118的Datasheet PDF文件第3页浏览型号935282714118的Datasheet PDF文件第4页浏览型号935282714118的Datasheet PDF文件第5页浏览型号935282714118的Datasheet PDF文件第6页浏览型号935282714118的Datasheet PDF文件第7页 
PCA9670  
Remote 8-bit I/O expander for Fm+ I2C-bus with reset  
Rev. 02 — 17 July 2007  
Product data sheet  
1. General description  
The PCA9670 provides general purpose remote I/O expansion for most microcontroller  
families via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus  
family.  
The PCA9670 is a drop-in upgrade for the PCF8574 providing higher Fast-mode Plus  
(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM  
dimming of LEDs, higher I2C-bus drive (30 mA versus 3 mA) so that many more devices  
can be on the bus without the need for bus buffers, higher total package sink capacity  
(200 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time and  
more device addresses (64 versus 8) are available to allow many more devices on the bus  
without address conflicts.  
The difference between the PCA9670 and the PCF8574 is that the interrupt output on the  
PCF8574 is replaced by a RESET input on the PCA9670.  
The devices consist of an 8-bit quasi-bidirectional port and an I2C-bus interface. The  
PCA9670 have low current consumption and include latched outputs with 25 mA high  
current drive capability for directly driving LEDs.  
The internal Power-On Reset (POR), hardware reset pin (RESET), or software reset  
sequence initializes the I/Os as inputs.  
2. Features  
I 1 MHz I2C-bus interface  
I Compliant with the I2C-bus Fast and Standard modes  
I SDA with 30 mA sink capability for 4000 pF buses  
I 2.3 V to 5.5 V operation with 5.5 V tolerant I/Os  
I 8-bit remote I/O pins that default to inputs at power-up  
I Latched outputs with 25 mA sink capability for directly driving LEDs  
I Total package sink capability of 200 mA  
I Active LOW reset input  
I 64 programmable slave addresses using 3 address pins  
I Readable device ID (manufacturer, device type, and revision)  
I Low standby current  
I 40 °C to +85 °C operation  
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per  
JESD22-A115, and 1000 V CDM per JESD22-C101  
I Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA  
I Packages offered: SO16, TSSOP16, HVQFN16  

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