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934052130118 PDF预览

934052130118

更新时间: 2024-11-21 20:10:11
品牌 Logo 应用领域
恩智浦 - NXP 开关脉冲晶体管
页数 文件大小 规格书
14页 145K
描述
69A, 25V, 0.014ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3

934052130118 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PSSO-G2
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.84
雪崩能效等级(Eas):60 mJ外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:25 V
最大漏极电流 (ID):69 A最大漏源导通电阻:0.014 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PSSO-G2
元件数量:1端子数量:2
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:N-CHANNEL最大脉冲漏极电流 (IDM):240 A
认证状态:Not Qualified表面贴装:YES
端子形式:GULL WING端子位置:SINGLE
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

934052130118 数据手册

 浏览型号934052130118的Datasheet PDF文件第2页浏览型号934052130118的Datasheet PDF文件第3页浏览型号934052130118的Datasheet PDF文件第4页浏览型号934052130118的Datasheet PDF文件第5页浏览型号934052130118的Datasheet PDF文件第6页浏览型号934052130118的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
N-channel TrenchMOS transistor  
Logic level FET  
PHP69N03LT, PHB69N03LT  
PHD69N03LT  
FEATURES  
SYMBOL  
QUICK REFERENCE DATA  
d
’Trench’ technology  
• Very low on-state resistance  
• Fast switching  
• Low thermal resistance  
• Logic level compatible  
VDSS = 25 V  
ID = 69 A  
R
DS(ON) 12 m(VGS = 10 V)  
g
RDS(ON) 14 m(VGS = 5 V)  
s
GENERAL DESCRIPTION  
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.  
Applications:-  
• High frequency computer motherboard d.c. to d.c. converters  
• High current switching  
The PHP69N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.  
The PHB69N03LT is supplied in the SOT404 (D2PAK) surface mounting package.  
The PHD69N03LT is supplied in the SOT428 (DPAK)surface mounting package.  
PINNING  
SOT78 (TO220AB)  
SOT404 (D2PAK)  
SOT428 (DPAK)  
tab  
tab  
PIN  
1
DESCRIPTION  
tab  
gate  
2
drain 1  
source  
2
2
3
1 2 3  
1
3
1
3
tab drain  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDSS  
VDGR  
VGS  
Drain-source voltage  
Tj = 25 ˚C to 175˚C  
Tj = 25 ˚C to 175˚C; RGS = 20 k  
-
-
-
-
25  
25  
± 15  
V
V
V
V
Drain-gate voltage  
Gate-source voltage (DC)  
Gate-source voltage (pulse  
peak value)  
VGSM  
Tj 150˚C  
± 20  
ID  
Drain current (DC)  
Tmb = 25 ˚C  
Tmb = 100 ˚C  
Tmb = 25 ˚C  
-
-
-
69  
48  
240  
A
A
A
IDM  
Drain current (pulse peak  
value)  
Ptot  
Tj, Tstg  
Total power dissipation  
Operating junction and  
storage temperature  
Tmb = 25 ˚C  
-
125  
175  
W
˚C  
- 55  
1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.  
October 1999  
1
Rev 1.600  

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