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9250-50

更新时间： 2024-09-27 00:04:27
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
13页 141K
描述
Frequency Generator & Integrated Buffers for PIII & Tualatin

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中文翻译

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9250-50 数据手册

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ICS9250-50  
Integrated  
Circuit  
Systems, Inc.  
Frequency Generator & Integrated Buffers for PIII & Tualatin™  
Recommended Application:  
Pin Configuration  
815B Solano B step style chipset  
Output Features:  
VDDA  
X1  
X2  
GNDA  
1
2
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
REF0/FS4*1  
VDDLAPIC  
IOAPIC  
•
•
•
•
•
•
•
2 - CPUs @ 2.5V, up to 133MHz.  
13 - SDRAM @ 3.3V, up to 133MHz.  
3 - 3V66 @ 3.3V, 2x PCI MHz.  
8 - PCI @ 3.3V  
1 - 48MHz, @ 3.3V fixed  
1 - 24/48MHz @ 3.3V  
3
4
5
6
7
8
9
VDDLCPU  
CPUCLK0  
CPUCLK1  
GNDLCPU  
GNDSDR  
SDRAM0  
SDRAM1  
SDRAM2  
VDDSDR  
SDRAM3  
SDRAM4  
SDRAM5  
GNDSDR  
SDRAM6  
SDRAM7  
SDRAM_F  
VDDSDR  
GND48  
GND3V66  
3V66-0  
3V66-1  
3V66-2  
VDD3V66  
VDDPCI  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
1*FS0/PCICLK0  
1*FS1/PCICLK1  
1*SEL24_48#/PCICLK2  
GNDPCI  
1 - REF @ 3.3V, 14.318MHz.  
•
1 - IOAPIC @ 2.5V 16.67MHz.  
Features:  
PCICLK3  
PCICLK4  
PCICLK5  
VDDPCI  
PCICLK6  
PCICLK7  
GNDPCI  
•
•
•
•
Support PC133 SDRAM.  
Up to 133MHz frequency support  
Support power management through PD#  
Spread spectrum for EMI control  
(± 0.25% Center Spread or 0 to -0.5% down spread)  
Vtt_PWRGD/PD#  
SCLK  
24_48MHz/FS21*  
48MHz/FS3*1  
VDD48  
VDDSDR  
SDRAM8  
SDRAM9  
GNDSDR  
•
•
Uses external 14.318MHz crystal  
FS pins for frequency select  
SDATA  
VDDSDR  
SDRAM11  
SDRAM10  
GNDSDR  
Key Specifications:  
•
•
CPU Output Jitter: <250ps  
CPU Output Skew: <175ps  
•
•
•
PCI Output Skew: <500ps  
3V66 Output Skew <175ps  
56-Pin 300 mil SSOP  
1. These pins will have 1.5 to 2X drive strength.  
* 120K ohm pull-up to VDD on indicated inputs.  
For group skew timing, please refer to the  
Group Timing Relationship Table.  
Block Diagram  
Functionality  
FS4 FS3 FS2 FS1 FS0 CPU SDRAM 3V66  
PCI  
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
66.67 100.00 66.67 33.33  
100.00 100.00 66.67 33.33  
133.33 133.33 66.67 33.33  
133.33 100.00 66.67 33.33  
PLL2  
48MHz  
24_48MHz  
/ 2  
X1  
X2  
XTAL  
OSC  
REF0  
For other hardware/I2C selectable frequencies please  
refer to Byte 0 frequency select register.  
PLL1  
Spread  
CPU  
DIVDER  
CPUCLK (1:0)  
2
Spectrum  
SDRAM  
DIVDER  
SDRAM (11:0)  
SDRAM_F  
IOAPIC  
12  
FS(4:0)  
PD#  
Control  
Logic  
Power Groups  
IOAPIC  
DIVDER  
VDD48 = Fixed PLL power  
GND48 = Fixed PLL GND  
VDDA = Power for CPU PLL  
GNDA = GND for CPU PLL  
Vtt_PWRGD  
SEL24_48#  
SDATA  
Config.  
Reg.  
PCI  
DIVDER  
PCICLK (7:0)  
3V66 (2:0)  
8
3
SCLK  
3V66  
DIVDER  
0594A—07/08/02  
1234567...13

中文翻译

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