Datasheet > 9248YF-50-T

9248YF-50-T

更新时间： 2024-11-27 06:34:03

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
10页	252K
描述
Frequency Timing Generator for Pentium II Systems

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9248YF-50-T 数据手册

ICS9248-50

Integrated

Circuit

Systems, Inc.

Frequency Timing Generator for Pentium II Systems

General Description

The ICS9248-50

Features

•

Generates the following system clocks:

- 2 CPU (2.5V) up to 100MHz.

- 6 PCI (3.3V) @ 33.3MHz (Includes one free

running).

- 2 REF clks (3.3V) at 14.318MHz.

Skew characteristics:

•

- CPU – CPU<175ps

- PCI – PCI < 500ps

- CPU(early) – PCI = 1.5ns – 4ns.

ICS9248-50

•

Supports Spread Spectrum modulation for CPU and

PCI clocks, 0.5% down spread

Efficient Power management scheme through stop

clocks and power down modes.

Uses external 14.318MHz crystal, no external load

cap required for CL=18pF crystal.

28-pin (209 mil) SSOP package

Block Diagram

Pin Configuration

28-Pin SSOP

Power Groups

0278I—06/03/03

12 3 4 5 6 7...10

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