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8T39S04A PDF预览

8T39S04A

更新时间: 2024-11-06 01:13:47
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
36页 807K
描述
Crystal or Differential to Differential Clock Fanout Buffer

8T39S04A 数据手册

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Crystal or Differential to  
8T39S04A  
Datasheet  
Differential Clock Fanout Buffer  
General Description  
Features  
The 8T39S04A is a high-performance clock fanout buffer. The input  
clock can be selected from two differential inputs or one crystal input.  
The internal oscillator circuit is automatically disabled if the crystal  
input is not selected. The crystal pin can be driven by a single-ended  
clock.The selected signal is distributed to four differential outputs  
which can be configured as LVPECL, LVDS or HSCL outputs. In  
addition, an LVCMOS output is provided. All outputs can be disabled  
into a high-impedance state. The device is designed for a signal  
fanout of high-frequency, low phase-noise clock and data signal. The  
outputs are at a defined level when inputs are open or tied to ground.  
It is designed to operate from a 3.3V or 2.5V core power supply, and  
either a 3.3V or 2.5V output operating supply.  
Two differential reference clock input pairs  
Differential input pairs can accept the following input levels:  
LVPECL, LVDS, HCSL, HSTL and Single-ended  
Crystal Oscillator Interface  
Crystal input frequency range: 10MHz to 40MHz  
Maximum Output Frequency  
LVPECL - 2GHz  
LVDS  
HCSL  
- 2GHz  
- 250MHz  
LVCMOS - 250MHz  
Two banks, each has two differential output pairs that can be  
configured as LVPECL or LVDS or HCSL  
One single-ended reference output with synchronous enable to  
Block Diagram  
avoid clock glitch  
Output skew: 80ps (maximum), Bank A and Bank B at the same  
PullDown  
output level  
Part-to-part skew: 200ps (typical), design target  
PullDown  
Additive RMS phase jitter @ 156.25MHz, (12kHz - 20MHz):  
34.7fs (typical), 3.3V/ 3.3V  
Supply voltage modes:  
VDD/VDDO  
3.3V/3.3V  
3.3V/2.5V  
2.5V/2.5V  
-40°C to 85°C ambient operating temperature  
Lead-free (RoHS 6) packaging  
Pin Assignment  
23 22 21 20 19 18 17  
24  
25  
26  
16  
15  
14  
13  
12  
11  
10  
9
nc  
REF_SEL1  
nCLK0  
REFOUT  
nCLK1  
CLK1 27  
CLK0  
28  
29  
30  
31  
32  
VDD  
REFOUT  
VDDOREF  
REF_SEL0  
XTAL_OUT  
XTAL_IN  
VDD  
8T39S04A  
OE_SE  
SMODE1  
SMODE0  
2
3
4
5
6
7
8
1
32-pin, 5mm x 5mm VFQFN Package  
©2016 Integrated Device Technology, Inc.  
1
May 20, 2016  

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