Datasheet > 8SLVP1208

8SLVP1208

更新时间： 2023-12-20 18:45:41

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
25页	1007K
描述
2:8,LVPECL Output Fanout Buffer

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

8SLVP1208 数据手册

Low Phase Noise, 1-to-8, 3.3V, 2.5V

LVPECL Output Fanout Buffer

8SLVP1208

Datasheet

General Description

Features

The 8SLVP1208 is a high-performance differential LVPECL fanout

buffer. The device is designed for the fanout of high-frequency, very

low additive phase-noise clock and data signals. The 8SLVP1208 is

characterized to operate from a 3.3V and 2.5V power supply.

Guaranteed output-to-output and part-to-part skew characteristics

make the 8SLVP1208 ideal for those clock distribution applications

demanding well-defined performance and repeatability. Two

selectable differential inputs and eight low skew outputs are

available. The integrated bias voltage generators enables easy

interfacing of single-ended signals to the device inputs. The device is

optimized for low power consumption and low additive phase noise.

• Eight low skew, low additive jitter LVPECL output pairs

• Two selectable, differential clock input pairs

• Differential pairs can accept the following differential input

levels: LVDS, LVPECL, CML

• Maximum input clock frequency: 2GHz

• LVCMOS interface levels for the control input (input select)

• Output skew: 28ps (typical)

• Propagation delay: 410ps (maximum)

• Low additive phase jitter, RMS: 54.1fs (maximum)

(f_REF= 156.25MHz, V_PP= 1V, 12kHz–20MHz)

• Full 3.3V and 2.5V supply voltage

• Maximum device current consumption (I_EE): 141mA

• Available in lead-free (RoHS 6), 28-Lead VFQFPN package

• -40°C to 85°C ambient operating temperature

• Supports case temperature ≤ 105°C operations

• Differential PCLK0, nPCLK0 and PCLK1, nPCLK1 pairs can also

accept single-ended LVCMOS levels. See Applications section

Wiring the Differential Input to Accept Single-Ended Levels

(Figure 1A and Figure 1B)

• Supports PCI Express Gen1–5

Block Diagram

Pin Assignment

V_CC

nQ0

Pulldown

Pullup/Pulldown

nQ1

PCLK0

nPCLK0

nQ2

f_REF

V_CC

nQ3

Pulldown

PCLK1

nQ4

Pullup/Pulldown

nPCLK1

nQ5

nQ6

8SLVP1208

28-VFQFPN

Top View

Pulldown

SEL

Voltage

Reference

V_REF

nQ7

R31DS0035EU0800 May 20, 2021

12 3 4 5 6 7...25

中文翻译

下载PDF

与8SLVP1208相关器件

型号	品牌	获取价格	描述	数据表
8SLVP1212ANLGI	IDT	获取价格	Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP1212ANLGI/W	IDT	获取价格	Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP1212ANLGI8	IDT	获取价格	Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP1212I	IDT	获取价格	Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP1212I	RENESAS	获取价格	2:12,3.3V,2.5V LVPECL Fanout Buffer
8SLVP2102	IDT	获取价格	2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI/W	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102ANLGI8	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
8SLVP2102I	IDT	获取价格	Low Phase Noise, Dual 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer

与8SLVP1208相关文章

共享储能电站：数据驱动与政策引领下的黄金机遇
2024-06-26

11
US1M数据手册解读：产品特性、替换型号推荐
2024-06-26

4
解析BAV99LT1G手册：参数分析、替换型号推荐
2024-06-26

4
解读BSS138PW数据手册：产品特性、电气参数及替换型号推荐
2024-06-26

6

产品中心

服务支持

精选活动

关于我们

帮助中心

8SLVP1208

8SLVP1208 数据手册

与8SLVP1208相关器件

与8SLVP1208相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

8SLVP1208

8SLVP1208 数据手册

与8SLVP1208相关器件

与8SLVP1208相关文章

您还可以找

您在本页遇到什么问题？