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89HPES12N3A

更新时间: 2024-09-23 03:11:11
品牌 Logo 应用领域
艾迪悌 - IDT 开关PC
页数 文件大小 规格书
2页 56K
描述
12 Lane 3-Port PCI Express㈢ Switch

89HPES12N3A 数据手册

 浏览型号89HPES12N3A的Datasheet PDF文件第2页 
89HPES12N3A  
Product Brief  
12 Lane 3-Port  
PCI Express® Switch  
Flexible Architecture with Numerous Configuration Options  
Device Overview  
The 89HPES12N3A, a 12 lane 3-port PCI Express® switch, is a  
member of the IDT PRECISE™ family of PCI Express switching solu-  
tions. The PES12N3A is a peripheral chip that performs PCI Express  
Packet switching with a feature set optimized for high performance  
applications such as servers and storage. It provides connectivity and  
switching functions between a PCI Express upstream port and two  
downstream ports or peer-to-peer switching between downstream ports.  
Automatic per port link width negotiation to x4, x2 or x1  
Automatic lane reversal on all ports  
Automatic polarity inversion on all lanes  
Ability to load device configuration from serial EEPROM  
Legacy Support  
PCI compatible INTx emulation  
Bus locking  
The 89HPES12N3A offers an enhanced architecture and feature set  
in a package that is pin-compatible with the first generation  
89HPES12N3 12-lane, 3-port PCIe switch.  
Highly Integrated Solution  
Requires no external components  
Incorporates on-chip internal memory for packet buffering and  
queueing  
Features  
Integrates twelve 2.5 Gbps embedded SerDes with 8B/10B  
encoder/decoder (no separate transceivers needed)  
High Performance PCI Express Switch  
Twelve 2.5Gbps PCI Express lanes  
Three switch ports  
Reliability, Availability, and Serviceability (RAS) Features  
Supports ECRC and Advanced Error Reporting  
Upstream port configurable up to x4  
Downstream ports configurable up to x4  
Low-latency cut-through switch architecture  
Support for Max Payload Sizes up to 2048 bytes  
One virtual channel  
Internal end-to-end parity protection on all TLPs ensures data  
integrity even in systems that do not implement end-to-end  
CRC (ECRC)  
Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O  
Compatible with Hot-Plug I/O expanders used on PC and  
server motherboards  
Eight traffic classes  
PCI Express Base Specification Revision 1.1 compliant  
Block Diagram  
3-Port Switch Core  
Port  
Arbitration  
Scheduler  
Route Table  
Frame Buffer  
Transaction Layer  
Transaction Layer  
Data Link Layer  
Transaction Layer  
Data Link Layer  
Data Link Layer  
Multiplexer/Demultiplexer  
Multiplexer/Demultiplexer  
Multiplexer/Demultiplexer  
Phy  
Phy  
Phy  
Phy  
Logical Logical  
Layer Layer  
Phy  
Phy  
Phy  
Phy  
Phy  
Phy  
Phy  
Phy  
Logical  
Layer  
Logical  
Layer  
Logical  
Layer  
Logical  
Layer  
Logical  
Layer  
Logical  
Layer  
Logical  
Layer  
Logical Logical  
Logical  
Layer  
Layer  
Layer  
SerDes  
SerDes  
SerDes  
SerDes SerDes  
SerDes  
SerDes SerDes  
SerDes  
SerDes  
SerDes  
SerDes  
12 PCI Express Lanes  
One x4 Upstream Port and Two x4 Downstream Ports  
Figure 1 Internal Block Diagram  
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.  
1 of 2  
February 8, 2007  
© 2007 Integrated Device Technology, Inc.  

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