Datasheet > 87972DYI-147LF

87972DYI-147LF

更新时间： 2024-11-06 01:13:47

品牌	Logo	应用领域
艾迪悌 - IDT		时钟外围集成电路晶体
页数	文件大小	规格书
18页	219K
描述
Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer

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87972DYI-147LF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	TQFP
包装说明：	10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BCC, LQFP-52	针数：	52
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.52
JESD-30 代码：	S-PQFP-G52	JESD-609代码：	e3
长度：	10 mm	湿度敏感等级：	3
端子数量：	52	最高工作温度：	85 °C
最低工作温度：	-40 °C	最大输出时钟频率：	150 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP52,.47SQ	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	260
电源：	3.3 V	主时钟/晶体标称频率：	40 MHz
认证状态：	Not Qualified	座面最大高度：	1.6 mm
子类别：	Clock Generators	最大压摆率：	250 mA
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	10 mm
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC	Base Number Matches：	1

87972DYI-147LF 数据手册

Low Skew, 1-to-12 LVCMOS/LVTTL

Clock Multiplier/Zero Delay Buffer

87972I-147

Datasheet

General Description

Features

The 87972I-147 is a low skew, LVCMOS/LVTTL Clock Generator

and a member of the family of High Performance Clock Solutions

from IDT. The 87972I-147 has three selectable inputs and

provides 14 LVCMOS/LVTTL outputs.

• Fully integrated PLL

• Fourteen LVCMOS/LVTTL outputs; (12)clocks, (1)feedback,

(1)sync

• Selectable crystal oscillator interface or LVCMOS/LVTTL

reference clock inputs

The 87972I-147 is a highly flexible device. Using the crystal

oscillator input, it can be used to generate clocks for a system. All

of these clocks can be the same frequency or the device can be

configured to generate up to three different frequencies among the

three output banks. Using one of the single ended inputs, the

87972I-147 can be used as a zero delay buffer/multiplier/ divider in

clock distribution applications.

• CLK0, CLK1 can accept the following input levels:

LVCMOS or LVTTL

• Output frequency range: 10MHz to 150MHz

• VCO range: 240MHz to 500MHz

• Output skew: 200ps (maximum)

• Cycle-to-cycle jitter, (all banks ÷4): 55ps (maximum)

• Full 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Compatible with PowerPC™and Pentium™Microprocessors

• Available in lead-free (RoHS 6)packages.

The three output banks and feedback output each have their own

output dividers which allows the device to generate a multitude of

different bank frequency ratios and output-to-input frequency

ratios. In addition, 2 outputs in Bank C (QC2, QC3) can be select-

ed to be inverting or non-inverting. The output frequency range is

10MHz to 150MHz. Input frequency range is 6MHz to 150MHz.

The 87972I-147 also has a QSYNC output which can be used or

system synchronization purposes. It monitors Bank A and Bank C

outputs and goes low one period of the faster clock prior to

coincident rising edges of Bank A and Bank C clocks. QSYNC

then goes high again when the coincident rising edges of Bank A

and Bank C occur. This feature is used primarily in applications

where Bank A and Bank C are running at different frequencies,

and is particularly useful when they are running at non-integer

multiples of one another.

Pin Assignment

Example Applications:

39 38 37 36 35 34 33 32 31 30 29 28 27

1.System Clock generator: Use a 16.66 MHz Crystal to generate

eight 33.33MHz copies for PCI and four 100MHz copies for the

CPU or PCI-X.

FSEL_B1 40

FSEL_B0 41

FSEL_A1 42

FSEL_FB1

QSYNC

24 GNDO

2.Line Card Multiplier: Multiply 19.44MHz from a back plane to

77.76MHz for the line Card ASICs and Serdes.

QC0

FSEL_A0

QA3

22 V_DDO

21 QC1

V_DDO

QA2

3.Zero Delay buffer for Synchronous memory: Fan out up to

twelve 100MHz copies from a memory controller reference

clock to the memory chips on a memory module with zero delay.

20 FSEL_C0

GNDO 47

QA1 48

FSEL_C1

QC2

V_DDO

QA0 50

QC3

15 GNDO

GNDO

VCO_SEL

14 INV_CLK

2 3 4 5 6 7 8 9 10 11 12 13

87972I-147

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y Package

Top View

December 7, 2015

12 3 4 5 6 7...18

中文翻译

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87972DYI-147LF 替代型号

型号	品牌	替代类型	描述	数据表
87972DYI-147LFT	IDT	完全替代	Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer
ICS87972DYI-147LFT	IDT	功能相似	Processor Specific Clock Generator, 150MHz, PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQ

与87972DYI-147LF相关器件

型号	品牌	获取价格	描述	数据表
87972DYI-147LFT	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer
87972DYI-147T	IDT	获取价格	Processor Specific Clock Generator, 150MHz, PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQ
87972DYILF	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972DYILFT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972DYIT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972I-147	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer
87973	IDT	获取价格	Low Skew, 1-to-12 LVCMOS / LVTTL Clock Mult iplier/Zero Delay Buffer
87973DYI	IDT	获取价格	PLL Based Clock Driver, 87973 Series, 13 True Output(s), 0 Inverted Output(s), CMOS, PQFP5
87973DYI-147	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147LF	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

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