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853111BY PDF预览

853111BY

更新时间: 2024-11-24 20:07:15
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
20页 526K
描述
Low Skew Clock Driver, 853111 Series, 10 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1 MM HEIGHT, MS-026BBA, TQFP-32

853111BY 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP, TQFP32,.35SQ,32针数:32
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.85其他特性:ECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.8V
系列:853111输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQFP-G32长度:7 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:32实输出次数:10
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TQFP
封装等效代码:TQFP32,.35SQ,32封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE峰值回流温度(摄氏度):225
电源:+-2.5/+-3.3 VProp。Delay @ Nom-Sup:0.635 ns
传播延迟(tpd):0.595 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.032 ns座面最大高度:1.2 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.8 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mm最小 fmax:3000 MHz
Base Number Matches:1

853111BY 数据手册

 浏览型号853111BY的Datasheet PDF文件第2页浏览型号853111BY的Datasheet PDF文件第3页浏览型号853111BY的Datasheet PDF文件第4页浏览型号853111BY的Datasheet PDF文件第5页浏览型号853111BY的Datasheet PDF文件第6页浏览型号853111BY的Datasheet PDF文件第7页 
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-  
2.5V, 3.3V LVPECL/ECL FANOUT BUFFER  
ICS853111B  
GENERAL DESCRIPTION  
FEATURES  
The ICS853111B is a low skew, high perfor-  
Ten differential 2.5V/3.3V LVPECL / ECL outputs  
Two selectable differential input pairs  
ICS  
HiPerClockS™  
mance 1-to-10 Differential-to-2.5V/3.3V LVPECL/  
ECL Fanout Buffer and a member of the  
HiPerClockS™ family of High Performance  
Clock Solutions from ICS. The ICS853111B  
PCLKx, nPCLKx pairs can accept the following  
differential input levels: LVPECL, LVDS, CML, SSTL  
is characterized to operate from either a 2.5V or a 3.3V  
power supply. Guaranteed output and part-to-part skew  
characteristics make the ICS853111B ideal for those clock  
distribution applications demanding well defined perfor-  
mance and repeatability.  
Maximum output frequency: >3GHz  
Translates any single ended input signal to 3.3V  
LVPECL levels with resistor bias on nPCLK input  
Output skew: 20ps (typical)  
Part-to-part skew: 85ps (typical)  
Propagation delay: 495ps (typical)  
Jitter, RMS: < 0.03ps (typical)  
LVPECL mode operating voltage supply range:  
VCC = 2.375V to 3.8V, VEE = 0V  
ECL mode operating voltage supply range:  
VCC = 0V, VEE = -3.8V to -2.375V  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nQ0  
PCLK0  
nPCLK0  
0
1
PCLK1  
nPCLK1  
Q1  
nQ1  
24 23 22 21 20 19 18 17  
VCCO  
nQ2  
Q2  
25  
26  
27  
28  
29  
30  
31  
32  
16  
15  
14  
13  
12  
11  
10  
9
VCCO  
Q7  
Q2  
nQ2  
nQ7  
Q8  
CLK_SEL  
VBB  
Q3  
nQ3  
nQ1  
Q1  
ICS853111B  
nQ8  
Q9  
Q4  
nQ4  
nQ0  
Q0  
nQ9  
Q5  
nQ5  
VCCO  
VCCO  
1
2
3
4
5
6
7
8
Q6  
nQ6  
Q7  
nQ7  
32-Lead TQFP, E-PAD  
7mm x 7mm x 1.0mm package body  
Q8  
nQ8  
Y Package  
Top View  
Q9  
nQ9  
IDT/ ICS1-TO-10, LVPECL/ECL FANOUT BUFFER  
1
ICS853111BY REV. C JANUARY 13, 2009  

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