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843004-01

更新时间: 2024-11-03 01:11:55
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 288K
描述
Femtoclocks Crystal-to-3.3V LVPECL Frequency Synthesizer

843004-01 数据手册

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Femtoclocks® Crystal-to-3.3V  
LVPECL Frequency Synthesizer  
843004-01  
Data Sheet  
GENERAL DESCRIPTION  
FEATURES  
The 843004-01 is a 4 output LVPECL synthesizer optimized to  
generate Ethernet reference clock frequencies and is a member  
of the family of high performance clock solutions from IDT. Using  
a 25MHz 18pF parallel resonant crystal, the following frequencies  
can be generated based on the settings of 2 frequency select pins  
(F_SEL[1:0]): 156.25MHz, 125MHz, 62.5MHz. The 843004-01  
• Four 3.3V LVPECL outputs  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
• Supports the following output frequencies:  
156.25MHz, 125MHz and 62.5MHz  
rd  
uses IDT’s 3 generation low phase noise VCO technology and  
• VCO range: 560MHz - 680MHz  
can achieve 1ps or lower typical rms phase jitter, easily meeting  
Ethernet jitter requirements.The 843004-01 is packaged in a small  
24-pin TSSOP package.  
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal  
(1.875MHz - 20MHz): 0.57ps (typical)  
• RMS phase noise at 156.25MHz (typical)  
Phase noise:  
Offset  
Noise Power  
100Hz ................-95.5 dBc/Hz  
1kHz .................-118 dBc/Hz  
10kHz .................-126 dBc/Hz  
100kHz ..............-126.6 dBc/Hz  
• Full 3.3V supply mode  
• -30°C to 85°C ambient operating temperature  
• Available in lead-free RoHS compliant package  
FREQUENCY SELECT FUNCTION TABLE  
PIN ASSIGNMENT  
Inputs  
Output Frequency  
M Divider N Divider  
Value  
M/N  
Divider Value  
nQ1  
Q1  
nQ2  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1
2
3
4
(25MHz Ref.)  
F_SEL1 F_SEL0  
Q2  
VCCO  
Q3  
Value  
VCCo  
Q0  
0
0
1
1
0
1
0
1
25  
4
5
6.25  
5
156.25  
125  
25  
nQ0  
MR  
nPLL_SEL  
nc  
5
6
nQ3  
VEE  
VCC  
nXTAL_SEL  
TEST_CLK  
VEE  
XTAL_IN  
XTAL_OUT  
25  
10  
2.5  
62.5  
7
8
9
10  
11  
12  
25  
not used  
not used  
VCCA  
F_SEL0  
VCC  
BLOCK DIAGRAM  
Pulldown  
F_SEL1  
F_SEL[1:0]  
2
Pulldown  
843004-01  
nPLL_SEL  
24-Lead TSSOP  
4.40mm x 7.8mm x 0.92mm  
package body  
Q0  
F_SEL[1:0]  
Pulldown  
0 0 ÷4  
nQO  
Q1  
TEST_CLK  
1
0
1
0
0 1 ÷5  
G Package  
Top View  
25MHz  
XTAL_IN  
1 0 ÷10  
1 1 not used  
VCO  
625MHz  
(w/25MHz  
Reference)  
nQ1  
Phase  
Detector  
OSC  
XTAL_OUT  
Pulldown  
Q2  
nXTAL_SEL  
nQ2  
Q3  
M = 25 (fixed)  
nQ3  
Pulldown  
MR  
©2016 Integrated Device Technology, Inc  
1
Revision B January 18, 2016  

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