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843003AG PDF预览

843003AG

更新时间: 2024-11-02 12:52:51
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
21页 2003K
描述
FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

843003AG 数据手册

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FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL  
FREQUENCY SYNTHESIZER  
ICS843003  
General Description  
Features  
The ICS843003 is a 3 differential output LVPECL  
Three 3.3V LVPECL outputs on two banks, A Bank with one  
LVPECL pair and B Bank with 2 LVPECL output pairs  
S
IC  
Synthesizer designed to generate Ethernet refer-  
ence clock frequencies and is a member of the  
HiPerClocksfamily of high performance clock  
solutions from IDT. Using a 31.25MHz or  
HiPerClockS™  
Using a 31.25MHz or 26.041666 crystal, the two output banks  
can be independently set for 625MHz, 312.5MHz, 156.25MHz  
or 125MHz  
26.041666MHz, 18pF parallel resonant crystal, the following  
frequencies can be generated based on the settings of 4 fre-  
quency select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz,  
312.5MHz, 156.25MHz, and 125MHz. The 843003 has 2 output  
banks, Bank A with 1 differential LVPECL output pair and Bank B  
with 2 differential LVPECL output pairs.  
Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
VCO range: 560MHz – 700MHz  
RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):  
0.51ps (typical)  
Offset  
Noise Power  
The two banks have their own dedicated frequency select pins and  
can be independently set for the frequencies mentioned above.  
The ICS843003 uses IDT’s 3rd generation low phase noise VCO  
technology and can achieve 1ps or lower typical rms phase jitter,  
easily meeting Ethernet jitter requirements. The ICS843003 is  
packaged in a small 24-pin TSSOP package.  
100Hz................ -96.8 dBc/Hz  
1kHz .................. -119.1 dBc/Hz  
10kHz ................ -126.4 dBc/Hz  
100kHz .............. -127.0 dBc/Hz  
Full 3.3V supply mode  
0°C to 70°C ambient operating temperature  
Industrial temperature available upon request  
Pin Assignment  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
1
24  
DIV_SELB1  
DIV_SELB0  
packages  
2
23  
VCCO_B  
VCO_SEL  
QB0  
nQB0  
MR  
VCCO_A  
3
4
22  
21  
5
6
7
20  
19  
18  
17  
QB1  
nQB1  
XTAL_SEL  
TEST_CLK  
XTAL_IN  
XTAL_OUT  
QA0  
nQA0  
OEB  
OEA  
FB_DIV  
VCCA  
8
9
10  
11  
12  
16  
15  
14  
13  
VCC  
DIV_SELA0  
VEE  
DIV_SEL  
A1  
ICS843003  
24-Lead TSSOP  
4.4mm x 7.8mm x 0.925mm  
package body  
Block Diagram  
Pullup  
OEA  
DIV_SELA[1:0]  
VCO_SEL  
2
Pulldown:Pullup  
G Package  
Pullup  
QA0  
0 0 ÷1  
nQA0  
Pulldown  
0
0 1 ÷2 (default)  
1 0 ÷4  
TEST_CLK  
XTAL_IN  
0
1
1 1 ÷5  
Phase  
Detector  
VCO  
625MHz  
OSC  
1
XTAL_OUT  
XTAL_SEL  
QB0  
Pullup  
FB_DIV  
0 0 ÷1  
nQB0  
0 1 ÷2  
0 = ÷20 (default)  
1 = ÷24  
1 0 ÷4 (default)  
1 1 ÷5  
QB1  
Pulldown  
nQB1  
FB_DIV  
DIV_SELB[1:0]  
MR  
2
Pullup:Pulldown  
Pulldown  
Pullup  
OEB  
IDT™ / ICS™ LVPECL FREQUENCY SYNTHESIZER  
1
ICS843003AG REV. A OCTOBER 23, 2008  

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