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8413S08BKILFT PDF预览

8413S08BKILFT

更新时间: 2024-12-02 01:14:19
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
34页 639K
描述
Clock Generator for Cavium Processors

8413S08BKILFT 数据手册

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Clock Generator for Cavium  
Processors  
8413S08  
Data Sheet  
General Description  
Features  
The 8413S08 is a high performance PLL-based clock generator  
optimized for processor core, PCI/PCI-X/PCIe bus, SGMII and  
Gigabit Ethernet PHY clocks. The clock generator offers ultra-low  
jitter outputs that make it ideal to serve as a central clocking device  
for multiple clock destinations. The output frequencies are generated  
from a 25MHz parallel resonant crystal, or external differential input  
source. The industrial temperature range of the 8413S08 supports  
tele-communication, networking and storage requirements.  
Eight selectable 100MHz or 125MHz clocks for PCI Expressand  
sRIO, HCSL interface levels  
One 156.25MHz SGMII clock, LVPECL interface levels  
Three LVCMOS/LVTTL outputs, 20output impedance  
Selectable external crystal or differential (single-ended) input  
source  
Crystal oscillator interface designed for 25MHz, parallel resonant  
crystal  
Differential CLK, nCLK input pair that can accept: LVPECL, LVDS,  
LVHSTL, HCSL input levels  
Internal resistor bias on nCLK pin allows the user to drive CLK  
input with external single-ended (LVCMOS/ LVTTL) input levels  
Output supply voltage modes:  
VDD / VDDO  
3.3V/3.3V  
3.3V/2.5V  
Full 3.3V output supply mode (HCSL)  
PCI Express(2.5 Gb/s), Gen 2 (5 Gb/s), and Gen 3 (8 Gb/s) jitter  
compliant  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Pin Assignment  
56 55 54 53 52 51 50 49 48 47 46 45 44 43  
VDDO_REF  
VDD  
42  
41  
40  
39  
1
2
QREF1  
nQREF1  
QREF2  
nQREF2  
QREF3  
IREF  
VDDO_A  
nQA7  
3
ICS8413S08I  
4
5
38 QA7  
56-Lead VFQFN  
8mm x 8mm x 0.925mm  
package body  
6
nQA6  
QA6  
37  
36  
35  
34  
33  
32  
31  
30  
29  
7
nQREF3  
VDDO_REF  
VDDO_A  
8
K Package  
Top View  
VDD  
9
nQA5  
QA5  
VDDA  
10  
11  
12  
13  
14  
nQA4  
XTAL_IN  
XTAL_OUT  
nXTAL_SEL  
GND  
QA4  
VDDO_A  
GND  
15 16 17 18 19 20 21 22 23 24 25 26 27 28  
©2016 Integrated Device Technology, Inc.  
1
October 3, 2016  

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