Crystal-to-LVCMOS/LVTTL
Frequency Synthesizer
840S05I
Data Sheet
General Description
Features
The 840S05I is a five output LVCMOS/LVTTL Frequency
Synthesizer accepting crystal or single-ended reference clock
inputs. The 840S05I uses a 25MHz parallel resonant crystal to
generate 33.33MHz – 166.67MHz clock signals, replacing solutions
requiring multiple oscillator and fan-out buffer solution. The device
supports output slew rate control with two slew select pins
(SLEW[1:0]). The VCO operates at a frequency of 2GHz. The device
has 2 output banks, Bank A with two 33.33MHz – 166.67MHz
LVCMOS/LVTTL outputs and Bank B with two 33.33MHz –
166.67MHz LVCMOS/LVTTL outputs.
• Four single-ended LVCMOS/LVTTL clock outputs
• One REF_OUT LVCMOS/LVTTL clock output
• Selectable crystal oscillator interface, 25MHz, 18pF parallel
resonant crystal or LVCMOS/LVTTL single-ended reference input
• Supports the following output frequencies on either bank:
33.33MHz, 50MHz, 66.67MHz, 83.33MHz, 100MHz, 125MHz,
133.33MHz, and 166.67MHz
• VCO: 2GHz
• Slew rate control
• Output supply modes:
The two banks have their own dedicated frequency select pins and
can be independently set for frequencies in the ranges mentioned
above. Designed for networking and industrial applications, the
840S05I can also drive the high-speed clock inputs of
Core/Output
3.3V/3.3V
3.3V/2.5V
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
communication processors, DSPs, switches and bridges.
Block Diagram
Pin Assignment
2
Pullup
F_SELA[0, 2]
Pulldown
QA0
F_SELA1
24 23 22 21 20 19 18 17
25MHz
÷NA
÷NB
VDD
nc
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
F_SELB0
MR/nOE
F_SELB1
GND
XTAL_IN
QA1
OSC
0
1
PLL
VCO
2GHz
XTAL_OUT
GND
F_SELA0
F_SELA1
SLEW0
SLEW1
F_SELA2
QB0
QB1
Pulldown
Pulldown
REF_IN
nc
REF_OUT
VDDO_REF
nREF_OE
REF_SEL
M = ÷80
2
3
Pulldown
Pulldown
SLEW[1:0]
MR/nOE
1
2
3
4
5
6
7
8
REF_OUT
Pulldown
Pullup
F_SELB[2:0]
nREF_OE
840S05I
32-Lead TQFP, E-Pad
7mm x 7mm x 1mm package body
Y Package
Top View
©2016 Integrated Device Technology, Inc
1
Revision A April 11, 2016