Semiconductor
82C55A
CMOS Programmable
Peripheral Interface
June 1998
Features
Description
• Pin Compatible with NMOS 8255A
• 24 Programmable I/O Pins
• Fully TTL Compatible
The Harris 82C55A is a high performance CMOS version of
the industry standard 8255A and is manufactured using a
self-aligned silicon gate CMOS process (Scaled SAJI IV). It
is a general purpose programmable I/O device which may be
used with many different microprocessors. There are 24 I/O
pins which may be individually programmed in 2 groups of
12 and used in 3 major modes of operation. The high
performance and industry standard configuration of the
82C55A make it compatible with the 80C86, 80C88 and
other microprocessors.
• High Speed, No “Wait State” Operation with 5MHz and
8MHz 80C86 and 80C88
• Direct Bit Set/Reset Capability
• Enhanced Control Word Read Capability
• L7 Process
Static CMOS circuit design insures low operating power. TTL
compatibility over the full military temperature range and bus
hold circuitry eliminate the need for pull-up resistors. The
Harris advanced SAJI process results in performance equal
to or greater than existing functionally equivalent products at
a fraction of the power.
• 2.5mA Drive Capability on All I/O Ports
• Low Standby Power (ICCSB) . . . . . . . . . . . . . . . . .10µA
Ordering Information
PART NUMBERS
TEMPERATURE PKG.
5MHz
8MHz
PACKAGE
RANGE
NO.
E40.6
E40.6
N44.65
N44.65
F40.6
F40.6
F40.6
F40.6
o
o
CP82C55A-5
IP82C55A-5
CS82C55A-5
IS82C55A-5
CD82C55A-5
ID82C55A-5
CP82C55A
IP82C55A
CS82C55A
IS82C55A
CD82C55A
ID82C55A
0 C to 70 C
40 Ld PDIP
o
o
-40 C to 85 C
o
o
0 C to 70 C
44 Ld PLCC
o
o
-40 C to 85 C
o
o
0 C to 70 C
40 Ld
CERDIP
o
o
-40 C to 85 C
o
o
MD82C55A-5/B MD82C55A/B
8406601QA 8406602QA
-55 C to 125 C
SMD#
44 Pad
CLCC
o
o
MR82C55A-5/B MR82C55A/B
-55 C to 125 C
J44.A
J44.A
8406601XA
8406602XA
SMD#
Pinouts
82C55A (DIP)
TOP VIEW
82C55A (CLCC)
82C55A (PLCC)
TOP VIEW
TOP VIEW
1
2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
PA3
PA2
PA1
PA0
RD
PA4
6
5 4 3 2 1 44 43 42 41 40
PA5
PA6
PA7
WR
RESET
D0
6
5 4 3 2 1 44 43 42 41 40
3
39
38
7
8
GND
NC
NC
RESET
D0
4
CS
GND
A1
A0
PC7
NC
7
8
9
39
38
37 D1
RESET
D0
5
37
36
35
34
33
32
31
9
A1
6
CS
10
11
12
13
14
15
16
17
A0
D1
10
11
12
13
14
15
16
17
D2
D3
NC
D4
D5
D6
D7
V
36
35
34
33
32
31
30
29
7
GND
A1
PC7
PC6
PC5
PC4
PC0
PC1
PC2
D2
8
D1
D3
9
A0
D2
D4
PC6
PC5
PC4
PC0
PC1
10
11
12
13
14
15
16
17
18
19
20
PC7
PC6
PC5
PC4
PC0
PC1
PC2
PC3
PB0
PB1
PB2
D3
D5
D4
D6
D5
30 D7
29 NC
D6
CC
D7
18 1920 21 22 23 24 25 26 27 28
18 19 20 21 22 23 24 25 26 27 28
26 V
CC
PB7
25
24
23
22
21
PB6
PB5
PB4
PB3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 2969.2
Copyright © Harris Corporation 1998
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