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83026AIL PDF预览

83026AIL

更新时间: 2024-09-14 08:08:35
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
11页 116K
描述
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

83026AIL 数据手册

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ICS83026I  
Integrated  
Circuit  
Systems, Inc.  
LOW  
S
KEW, 1-TO-2  
D
IFFERENTIAL  
-
TO-LVCMOS/LVTTL FANOUT  
BUFFER  
GENERAL DESCRIPTION  
FEATURES  
The ICS83026I is a low skew, 1-to-2 Differ- 2 LVCMOS / LVTTL outputs  
ICS  
ential-to-LVCMOS/LVTTL Fanout Buffer and a  
Differential CLK, nCLK input pair  
HiPerClockS™  
member of the HiPerClockSfamily of High  
Performance Clock Solutions from ICS.The  
differential input can accept most differential sig-  
CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL  
Output frequency: 350MHz (typical)  
Output skew: 20ps (maximum)  
nal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and  
translate to two single-ended LVCMOS/LVTTL outputs with a  
maximum output skew of 20ps. The small 8-lead SOIC foot-  
print makes this device ideal for use in applications with lim-  
ited board space.  
Part-to-part skew: 600ps (maximum)  
Small 8 lead SOIC package saves board space  
3.3V operating supply  
-40°C to 85°C ambient operating temperature  
Lead-Free package available  
Pin-to-pin compatible with MC100EPT26  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Q0  
nc  
CLK  
nCLK  
nc  
VDD  
Q0  
1
2
3
4
8
7
6
5
CLK  
nCLK  
Q1  
Q1  
GND  
ICS83026I  
8-Lead SOIC  
3.8mm x 4.8mm, x 1.47mm package body  
M Package  
TopView  
83026AMI  
www.icst.com/products/hiperclocks.html  
REV. B NOVEMBER 9, 2004  
1

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