Datasheet > 813N2532AKLFT

813N2532AKLFT

更新时间： 2024-01-29 18:45:53

品牌	Logo	应用领域
艾迪悌 - IDT		时钟外围集成电路晶体
页数	文件大小	规格书
22页	1851K
描述
Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32

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813N2532AKLFT 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
针数：	32	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.79	Is Samacsys：	N
JESD-30 代码：	S-XQCC-N32	JESD-609代码：	e3
长度：	5 mm	湿度敏感等级：	3
端子数量：	32	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	156.25 MHz
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC32,.2SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
电源：	3.3 V	主时钟/晶体标称频率：	38.88 MHz
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Clock Generators	最大压摆率：	31 mA
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	5 mm
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, OTHER	Base Number Matches：	1

813N2532AKLFT 数据手册

Jitter Attenuator & FemtoClock^®NG Multiplier

ICS813N2532

DATA SHEET

General Description

Features

The ICS813N2532 device uses IDT's fourth generation FemtoClock^®

NG technology for optimal high clock frequency and low phase noise

performance, combined with a low power consumption and high

power supply noise rejection. The ICS813N2532 is a PLL based

synchronous multiplier that is optimized for PDH or SONET to

Ethernet clock jitter attenuation and frequency translation.

• Fourth generation FemtoClock® NG technology

• Two LVPECL output pairs

• Output frequencies: 19.44MHz, 25MHz, 125MHz, 155.52MHz and

156.25MHz

• Two differential inputs support the following input types: LVPECL,

LVDS, LVHSTL, HCSL

The ICS813N2532 is a fully integrated Phase Locked loop utilizing a

FemtoClock NG Digital VCXO that provides the low jitter, high

frequency SONET/PDH output clock that easily meets OC-48 jitter

requirements. This VCXO technology simplifies PLL design by

replacing the pullable crystal requirement of analog VCXOs with a

fixed 27MHz generator crystal. Jitter attenuation down to 10Hz is

provided by an external loop filter. Pre-divider and output divider

multiplication ratios are selected using device selection control pins.

The multiplication ratios are optimized to support most common

clock rates used in PDH, SONET and Ethernet applications. The

device requires the use of an external, inexpensive fundamental

mode 27MHz crystal. The device is packaged in a space-saving

32-VFQFN package and supports industrial temperature range.

• Accepts input frequencies from 8kHz to 38.88MHz including

8kHz, 19.44MHz, 25MHz and 38.88MHz

• Crystal interface optimized for a 27MHz, 10pF parallel resonant

crystal

• Attenuates the phase jitter of the input clock by using a low-cost

fundamental mode crystal

• Customized settings for jitter attenuation and reference tracking

using external loop filter connection

• FemtoClock NG frequency multiplier provides low jitter, high

frequency output

• Absolute pull range: 100ppm

• Power supply noise rejection (PSNR): -95dB (typical)

• RMS phase jitter @ 156.25MHz, using a 27MHz crystal

(12kHz – 20MHz): 0.6ps (typical)

• RMS phase jitter @ 155.52MHz, using a 27MHz crystal

Pin Assignment

(12kHz – 20MHz): 0.622ps (typical)

• RMS phase jitter @ 125MHz, using a 27MHz crystal

(12kHz – 20MHz): 0.6ps (typical)

• 3.3V supply voltage

• 0°C to 70°C ambient operating temperature

• Available in lead-free (RoHS 6) package

32 31 30 29 28 27 26 25

LF1

LF0

VEE

nQB

ISET

V^CCO

nQA

V^EE

CLK_SEL

V^CC

LOR

V^EE

ODASEL_0

10 11 12 13 14 15 16

ICS813N2532

32 Lead VFQFN

5mm x 5mm x 0.925mm package body

K Package

Top View

ICS813N2532AK REVISION B JUNE 3, 2011

12 3 4 5 6 7...22

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813N2532CKLF	IDT	Jit ter At tenuator & FemtoClock NG Mult iplier	获取价格
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