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813N2532 PDF预览

813N2532

更新时间: 2024-11-08 01:11:39
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
24页 371K
描述
Jit ter At tenuator & FemtoClock NG Mult iplier

813N2532 数据手册

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Jitter Attenuator & FemtoClock® NG Multiplier  
813N2532  
Datasheet  
General Description  
Features  
The 813N2532 device uses IDT's fourth generation FemtoClock®  
NG technology for optimal high clock frequency and low phase noise  
performance, combined with a low power consumption and high  
power supply noise rejection. The 813N2532 is a PLL based  
synchronous multiplier that is optimized for PDH or SONET to  
Ethernet clock jitter attenuation and frequency translation.  
Fourth generation FemtoClock® NG technology  
Two LVPECL output pairs  
Output frequencies: 19.44MHz, 25MHz, 125MHz, 155.52MHz  
and 156.25MHz  
Two differential inputs support the following input types: LVPECL,  
LVDS, LVHSTL, HCSL  
The 813N2532 is a fully integrated Phase Locked loop utilizing a  
FemtoClock NG Digital VCXO that provides the low jitter, high  
frequency SONET/PDH output clock that easily meets OC-48 jitter  
requirements. This VCXO technology simplifies PLL design by  
replacing the pullable crystal requirement of analog VCXOs with a  
fixed 27MHz generator crystal. Jitter attenuation down to 10Hz is  
provided by an external loop filter. Pre-divider and output divider  
multiplication ratios are selected using device selection control pins.  
The multiplication ratios are optimized to support most common  
clock rates used in PDH, SONET and Ethernet applications. The  
device requires the use of an external, inexpensive fundamental  
mode 27MHz crystal. The device is packaged in a space-saving  
32-VFQFN package and supports commercial temperature range.  
Accepts input frequencies from 8kHz to 38.88MHz including  
8kHz, 19.44MHz, 25MHz and 38.88MHz  
Crystal interface optimized for a 27MHz, 10pF parallel  
resonant crystal  
Attenuates the phase jitter of the input clock by using a low-cost  
fundamental mode crystal  
Customized settings for jitter attenuation and reference tracking  
using external loop filter connection  
FemtoClock NG frequency multiplier provides low jitter, high  
frequency output  
Absolute pull range: 100ppm  
Power supply noise rejection (PSNR): -95dB (typical)  
RMS phase jitter @ 156.25MHz, using a 27MHz crystal  
(12kHz – 20MHz): 0.64ps (typical)  
RMS phase jitter @ 155.52MHz, using a 27MHz crystal  
(12kHz – 20MHz): 0.64ps (typical)  
RMS phase jitter @ 125MHz, using a 27MHz crystal  
(12kHz – 20MHz): 0.66ps (typical)  
Pin Assignment  
3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Lead-free (RoHS 6) packaging  
32 31 30 29 28 27 26 25  
1
2
3
4
5
6
7
8
LF1  
LF0  
VEE  
24  
23  
22  
21  
20  
nQB  
QB  
ISET  
VCCO  
nQA  
VEE  
CLK_SEL  
VCC  
QA  
19  
18  
17  
LOR  
VEE  
VEE  
ODASEL_0  
9
10 11 12 13 14 15 16  
813N2532  
32 Lead VFQFN  
5mm x 5mm x 0.925mm package body  
3.15mm x 3.15mm ePad size  
K Package  
Top View  
©2016 Integrated Device Technology, Inc.  
1
Revision D, April 8, 2016  

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