Datasheet > 80C186EA

80C186EA

更新时间： 2022-11-26 05:22:07

品牌	Logo	应用领域
英特尔 - INTEL		/
页数	文件大小	规格书
50页	709K
描述
16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

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80C186EA 数据手册

80C186EA/80C188EA, 80L186EA/80L188EA

272432–4

272432–3

(A) Crystal Connection

(B) Clock Connection

NOTE:

The L C network is only required when using a third-overtone crystal.

Figure 2. Clock Configurations

80C186EA PERIPHERAL

ARCHITECTURE

Interrupt Control Unit

The 80C186EA can receive interrupts from a num-

ber of sources, both internal and external. The Inter-

rupt Control Unit (ICU) serves to merge these re-

quests on a priority basis, for individual service by

the CPU. Each interrupt source can be independent-

ly masked by the Interrupt Control Unit or all inter-

rupts can be globally masked by the CPU.

The 80C186EA has integrated several common sys-

tem peripherals with a CPU core to create a com-

pact, yet powerful system. The integrated peripher-

als are designed to be flexible and provide logical

interconnections between supporting units (e.g., the

interrupt control unit supports interrupt requests

from the timer/counters or DMA channels).

Internal interrupt sources include the Timers and

DMA channels. External interrupt sources come

from the four input pins INT3:0. The NMI interrupt

pin is not controlled by the ICU and is passed direct-

ly to the CPU. Although the timers only have one

request input to the ICU, separate vector types are

generated to service individual interrupts within the

Timer Unit.

The list of integrated peripherals include:

4-Input Interrupt Control Unit

3-Channel Timer/Counter Unit

2-Channel DMA Unit

13-Output Chip-Select Unit

Refresh Control Unit

Power Management logic

Timer/Counter Unit

The registers associated with each integrated peri-

heral are contained within a 128 x 16 register file

called the Peripheral Control Block (PCB). The PCB

can be located in either memory or I/O space on

any 256 byte address boundary.

The 80C186EA Timer/Counter Unit (TCU) provides

three 16-bit programmable timers. Two of these are

highly flexible and are connected to external pins for

control or clocking. A third timer is not connected to

any external pins and can only be clocked internally.

However, it can be used to clock the other two timer

channels. The TCU can be used to count external

events, time external events, generate non-repeti-

tive waveforms, generate timed interrupts, etc.

Figure 3 provides a list of the registers associated

with the PCB when the processor’s Interrupt Control

Unit is in Master Mode. In Slave Mode, the defini-

tions of some registers change. Figure 4 provides

1 2 3 456 7 8...50

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