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74VHCT86 PDF预览

74VHCT86

更新时间: 2024-11-20 22:51:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
8页 58K
描述
QUAD EXCLUSIVE OR GATE

74VHCT86 数据手册

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74VHCT86A  
QUAD EXCLUSIVE OR GATE  
PRELIMINARY DATA  
HIGH SPEED:tPD =5 ns (TYP.) atVCC =5V  
LOW POWER DISSIPATION:  
I
CC =2 µA (MAX.) at TA =25 oC  
COMPATIBLEWITH TTL OUTPUTS:  
VIH =2V (MIN), VIL = 0.8V(MAX)  
POWERDOWN PROTECTIONON INPUTS&  
OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
OPERATING VOLTAGERANGE:  
M
T
(Micro Package)  
(TSSOPPackage)  
ORDER CODES :  
74VHCT86AM  
74VHCT86AT  
metal wiring C2MOS technology.  
Power down protection is provided on all inputs  
and outputs and 0 to 7V can be accepted on  
inputs with no regard to the supply voltage. This  
device can be used to interface 5V to 3V.  
VCC (OPR)= 4.5V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES86  
IMPROVED LATCH-UP IMMUNITY  
LOWNOISE:VOLP = 0.8V(Max.)  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74VHCT86A is an advanced high-speed  
CMOS QUAD EXCLUSIVE OR GATE fabricated  
with sub-micron silicon gate and double-layer  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/8  
August 1999  

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