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74VHCT245A PDF预览

74VHCT245A

更新时间: 2024-11-03 22:56:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器
页数 文件大小 规格书
9页 70K
描述
OCTAL BUS TRANSCEIVER 3-STATE

74VHCT245A 数据手册

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74VHCT245A  
OCTAL BUS  
TRANSCEIVER (3-STATE)  
PRELIMINARY DATA  
HIGH SPEED:tPD =4.5ns (TYP.) atVCC = 5V  
LOW POWER DISSIPATION:  
ICC =4 µA (MAX.) at TA =25 oC  
COMPATIBLEWITH TTL OUTPUTS:  
VIH =2V (MIN), VIL = 0.8V(MAX)  
POWERDOWN PROTECTIONON INPUTS&  
OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
M
T
(Micro Package)  
(TSSOPPackage)  
ORDER CODES :  
74VHCT245AM  
74VHCT245AT  
level of the DIR input. The enable input G can be  
used to disable the device so that the busses are  
effectively isolated.  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 4.5V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES245  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
IMPROVED LATCH-UP IMMUNITY  
LOWNOISE:VOLP = 0.9V(Max.)  
IT IS PROHIBITED TO APPLY A SIGNAL TO A  
TERMINAL WHEN IT IS IN OUTPUT MODE  
AND WHEN A BUS TERMINAL IS FLOATING  
(HIGH IMPEDANCE STATE) IT IS REQUESTED  
TO FIX THE INPUT LEVEL BY MEANS OF  
EXTERNAL PULL DOWN OR PULL UP  
RESISTOR.  
DESCRIPTION  
The 74VHCT245A is an advanced high-speed  
CMOS OCTAL BUS TRANSCEIVER (3-STATE)  
fabricated with sub-micron silicon gate and  
double-layermetal wiring C2MOS technology.  
This IC is intended for two-way asynchronous  
communication between data busses; the  
direction of data trasmission is determined by the  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/9  
August 1999  

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