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74VHCT244MTC PDF预览

74VHCT244MTC

更新时间: 2024-11-19 21:12:35
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
10页 160K
描述
IC AHCT/VHCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, TSSOP-20, Bus Driver/Transceiver

74VHCT244MTC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSSOP, TSSOP20,.25Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.21
控制类型:ENABLE LOW系列:AHCT/VHCT
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.008 A
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):9.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74VHCT244MTC 数据手册

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October 1995  
74VHC244 74VHCT244  
#
Octal Buffer/Line Driver with TRI-STATE Outputs  
É
General Description  
The ’VHC/’VHCT244 is an advanced high speed CMOS oc-  
2
tal bus buffer fabricated with silicon gate C MOS technolo-  
gy. It achieves high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low pow-  
er dissipation. The ’VHC/’VHCT244 is a non-inverting  
TRI-STATE buffer having two active-low output enables.  
These devices are designed to be used as TRI-STATE  
memory address drivers, clock drivers, and bus oriented  
transmitter/receivers.  
Features  
Y
High noise immunity:  
e
e
28% V  
VHC  
VHCT V  
V
V
(min)  
NIH  
e
NIL  
2.0V, V  
CC  
e
0.8V  
IH  
IL  
Y
Y
Y
Power down protection:  
VHC inputs only  
VHCT inputs and outputs  
Low noise:  
e
e
VHC  
VHCT V  
V
0.6V (typ)  
0.7V (typ)  
OLP  
OLP  
An input protection circuit ensures that 0V7V can be ap-  
plied to the input pins without regard to the supply voltage.  
This device can be used to interface 5V to 3V systems and  
two supply systems such as battery back up. This circuit  
prevents device destruction due to mismatched supply and  
input voltages.  
Low power dissipation:  
@
e
Balanced propagation delays: t  
e
25 C  
I
4 mA (max)  
T
A
§
PLH  
CC  
Y
Y
j
t
PHL  
Pin and function compatible with 74HC/HCT244  
NOTE: ADD EXTERNAL PULL UP RESISTOR TO VHCT OUTPUTS TO  
DRIVE CMOS INPUTS  
Commercial  
74VHC244M  
Package Number  
M20B  
Package Description  
20-Lead Molded JEDEC SOIC  
20-Lead Molded EIAJ SOIC  
20-Lead Molded EIAJ Type 1 SSOP  
20-Lead Molded JEDEC Type 1 TSSOP  
20-Lead Molded DIP  
74VHC244SJ  
74VHC244MSC  
74VHC244MTC  
74VHC244N  
M20D  
MSC20  
MTC20  
N20A  
74VHCT244M  
74VHCT244SJ  
74VHCT244MTC  
74VHCT244N  
M20B  
20-Lead Molded JEDEC SOIC  
20-Lead Molded EIAJ SOIC  
20-Lead Molded JEDEC Type 1 TSSOP  
20-Lead Molded DIP  
M20D  
MTC20  
N20A  
Note: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter ‘‘X’’ to the ordering code.  
EIAJ Type 1 SSOP available on Tape and Reel only, order MSCX.  
Logic Symbol  
Connection Diagram  
Pin Assignment for DIP,  
SSOP, TSSOP and SOIC  
Truth Tables  
Inputs  
Outputs  
IEEE/IEC  
(Pins 12, 14, 16, 18)  
OE  
1
I
n
L
L
L
L
H
Z
H
X
H
Inputs  
OE  
Outputs  
(Pins 3, 5, 7, 9)  
I
2
n
L
L
L
H
Z
L
H
X
H
e
e
e
e
Z
H
L
HIGH Voltage Level  
LOW Voltage Level  
I
Immaterial  
High  
TL/F/11522–1  
Impedance  
TL/F/11522–3  
Pin Names  
OE , OE  
Description  
TRI-STATE Output Enable Inputs  
Inputs  
1
2
I
0
–I  
7
O
0
–O  
TRI-STATE Outputs  
7
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/11522  
RRD-B30M125/Printed in U. S. A.  

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