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74VHCT240AMX PDF预览

74VHCT240AMX

更新时间: 2024-11-03 23:24:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 88K
描述
Dual 4-Bit Inverting Buffer/Driver

74VHCT240AMX 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.300 INCH, MS-013, SOIC-20针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.27
Is Samacsys:N控制类型:ENABLE LOW
系列:AHCT/VHCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8015 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A湿度敏感等级:1
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:2.642 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.493 mmBase Number Matches:1

74VHCT240AMX 数据手册

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March 1997  
Revised March 1999  
74VHCT240A  
Octal Buffer/Line Driver with 3-STATE Outputs  
due to mismatched supply and input/output voltages. This  
General Description  
device can be used to interface 5V to 3V systems and two  
supply systems such as battery back up.  
Note 1: Outputs in OFF-State  
The VHCT240A is an advanced high speed CMOS octal  
bus transceiver fabricated with silicon gate CMOS technol-  
ogy. It achieves high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low  
power dissipation. The VHCT240A is an inverting 3-STATE  
buffer having two active-LOW output enables. This device  
is designed to be used as 3-STATE memory address driv-  
ers, clock drivers, and bus oriented transmitter/receivers.  
Features  
High Speed:  
tPD = 5.6 ns (typ) at VCC = 5V  
Power down protection is provided on inputs and  
outputs  
Protection circuits ensure that 0V to 7V can be applied to  
the input and output (Note 1) pins without regard to the  
supply voltage. These circuits prevent device destruction  
Low power dissipation:  
ICC = 4 µA (max) @ TA = 25°C  
Pin and function compatible with 74HCT240  
Ordering Code:  
Order Number  
74VHCT240AM  
74VHCT240ASJ  
74VHCT240AMTC  
74VHCT240AN  
Package Number  
M20B  
Package Description  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
M20D  
MTC20  
N20A  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
OE1, OE2  
Description  
3-STATE Output Enable  
I0–I7  
Inputs  
O0–O7  
Outputs 3-STATE Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS500002.prf  
www.fairchildsemi.com  

74VHCT240AMX 替代型号

型号 品牌 替代类型 描述 数据表
74VHCT240AM FAIRCHILD

完全替代

Octal Buffer/Line Driver with 3-STATE Outputs
SN74AHCT240DWR TI

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SN74AHCT240DW TI

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OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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