Datasheet > 74VHC9164FT

74VHC9164FT

更新时间： 2024-11-21 14:56:19

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
14页	243K
描述
8-bit Shift Register, TSSOP16B

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74VHC9164FT 数据手册

74VHC9164FT

CMOS Digital Integrated Circuits Silicon Monolithic

74VHC9164FT

1. Functional Description

•

8-Bit Shift Register (P-IN, S-OUT/S-IN, P-OUT)

2. General

The 74VHC9164FT is an ultra-high-speed 8-Bit Shift Register fabricated using silicon-gate CMOS technology.

The 74VHC9164FT combines low power consumption of CMOS with Schottky TTL speeds.

The 74VHC9164FT has parallel data inputs/outputs, a serial input and a serial output. It converts parallel data

into serial data or vice versa.

When P/S CONT is Low, Q/D1 to Q/D8 are configured as parallel data outputs. At this time, the SI input is serially

loaded on the rising edges of CK and unloaded from the Q/D1 to Q/D8 outputs in parallel. When CLR/LOAD input

is Low, all flip-flops are asynchronously reset, irrespective of the CK state.

When P/S CONT is High, Q/D1 to Q/D8 are configured as parallel data inputs. At this time, when CLR/LOAD is

Low, Q/D1 to Q/D8 latch data in parallel asynchronously from the CK input.

All the inputs have hysteresis between the positive-going and negative-going thresholds. Thus the 74VHC9164FT

is capable of squaring up transitions of slowly changing input signals and provides an improved noise immunity.

Additionally, all the inputs have a newly developed protection circuit without a diode returned to VCC. This

enables the inputs to be tolerant of up to 5.5 volts even when power supply is down.

The input power-down protection capability makes the 74VHC9164FT ideal for a wide range of applications, such

as interfacing between different voltages, voltage translation from 5 V to 3 V and battery back-up circuits.

3. Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: fMAX = 149 MHz (typ.) at VCC = 5.0 V

(4) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 

(5) Power-down protection is provided on all inputs.

(6) Balanced propagation delays: tPLH ≈ tPHL

(7) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales

representative.

4. Packaging

TSSOP16B

Start of commercial production

2014-06

2016-08-05

Rev.2.0

12 3 4 5 6 7...14

中文翻译

下载PDF

与74VHC9164FT相关器件

型号	品牌	获取价格	描述	数据表
74VHC9273FT	TOSHIBA	获取价格	Octal D-Type Flip-Flop, TSSOP20B
74VHC942N	TI	获取价格	0.3kbps DATA, MODEM, PDIP20, 0.300 INCH, PLASTIC, DIP-20
74VHC942WM	TI	获取价格	0.3kbps DATA, MODEM, PDSO20, 0.300 INCH, PLASTIC, SOIC-20
74VHC943	NSC	获取价格	300 Baud Modem (5V Supply)
74VHC943N	NSC	获取价格	300 Baud Modem (5V Supply)
74VHC943NX	NSC	获取价格	300 Baud Modem (5V Supply)
74VHC943WM	NSC	获取价格	300 Baud Modem (5V Supply)
74VHC943WMX	NSC	获取价格	300 Baud Modem (5V Supply)
74VHC9541FT	TOSHIBA	获取价格	Octal Buffer, TSSOP20B
74VHC9595FT	TOSHIBA	获取价格	8-bit Shift Register, TSSOP16B