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74VHC574N PDF预览

74VHC574N

更新时间: 2024-11-29 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 95K
描述
Octal D-Type Flip-Flop with 3-STATE Outputs

74VHC574N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, PLASTIC, MS-001, DIP-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.27
Is Samacsys:N系列:AHC/VHC
JESD-30 代码:R-PDIP-T20JESD-609代码:e3
长度:26.075 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:75000000 Hz
最大I(ol):0.008 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:RAIL峰值回流温度(摄氏度):NOT APPLICABLE
电源:2/5.5 VProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):19 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

74VHC574N 数据手册

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March 1993  
Revised April 1999  
74VHC574  
Octal D-Type Flip-Flop with 3-STATE Outputs  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
General Description  
The VHC574 is an advanced high speed CMOS octal flip-  
flop with 3-STATE output fabricated with silicon gate CMOS  
technology. It achieves the high speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. This 8-bit D-type flip-flop is  
controlled by a clock input (CP) and an output enable input  
(OE). When the OE input is HIGH, the eight outputs are in  
a high impedance state.  
Features  
High Speed: tPD = 5.6 ns (typ) at VCC = 5V  
High Noise Immunity: VNIH = VNIL = 28% VCC (Min)  
Power Down Protection is provided on all inputs  
Low Noise: VOLP = 0.6V (typ)  
An input protection circuit ensures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery back up. This cir-  
Low Power Dissipation: ICC = 4 µA (Max) @ TA = 25°C  
Pin and Function Compatible with 74HC574  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC574M  
74VHC574SJ  
74VHC574MTC  
74VHC574N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
D0–D7  
CP  
Description  
Data Inputs  
Clock Pulse Input  
OE  
3-STATE Output Enable Input  
3-STATE Outputs  
O0–O7  
© 1999 Fairchild Semiconductor Corporation  
DS011565.prf  
www.fairchildsemi.com  

74VHC574N 替代型号

型号 品牌 替代类型 描述 数据表
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