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74VHC574MTR PDF预览

74VHC574MTR

更新时间: 2024-11-30 04:48:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
14页 310K
描述
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING

74VHC574MTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:43 weeks 2 days风险等级:5.1
Is Samacsys:N系列:AHC/VHC
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:75000000 Hz
最大I(ol):0.008 A湿度敏感等级:3
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/5.5 V
Prop。Delay @ Nom-Sup:12 ns传播延迟(tpd):19 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

74VHC574MTR 数据手册

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74VHC574  
OCTAL D-TYPE FLIP FLOP  
WITH 3 STATE OUTPUTS NON INVERTING  
HIGH SPEED:  
= 180 MHz (TYP.) at V = 5V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
= 4 µA (MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 8 mA (MIN)  
BALANCED PROPAGATION DELAYS:  
OH  
OL  
Table 1: Order Codes  
PACKAGE  
t
t
PLH  
PHL  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
SOP  
74VHC574MTR  
74VHC574TTR  
V
CC  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 574  
IMPROVED LATCH-UP IMMUNITY  
while high level the outputs will be in a high  
impedance state.  
LOW NOISE: V  
= 0.9V (MAX.)  
OLP  
The Output control does not affect the internal  
operation of flip flop; that is, the old data can be  
retained or the new data can be entered even  
while the outputs are off.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74VHC574 is an advanced high-speed  
CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE  
OUTPUTS NON INVERTING fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology.  
These 8 bit D-Type flip-flop is controlled by a clock  
input (CK) and an output enable input (OE).  
On the positive transition of the clock, the Q  
outputs will be set to the logic states that were  
setup at the D inputs.  
While the (OE) input is low, the 8 outputs will be in  
a normal logic state (high or low logic level) and  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/14  
November 2004  

74VHC574MTR 替代型号

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OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING
74AHC574D NXP

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Octal D-type flip-flop; positive edge-trigger; 3-state
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