Datasheet > 逻辑 > 栅极> 74VHC32MX-NL

74VHC32MX-NL

更新时间： 2024-09-13 04:48:03

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		栅
页数	文件大小	规格书
7页	101K
描述
Quad 2-Input OR Gate

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74VHC32MX-NL 数据手册

November 1992

Revised February 2005

74VHC32

Quad 2-Input OR Gate

General Description

Features

The VHC32 is an advanced high speed CMOS 2-Input OR

Gate fabricated with silicon gate CMOS technology. It

achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

■ High Speed:

t_PD3.8 ns (typ) at V_CC5V

■ Low Power Dissipation:

I_CC

2 A (Max) at T_A25 C

The internal circuit is composed of 4 stages including buffer

output, which provide high noise immunity and stable out-

put. An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery back up. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

■ High Noise Immunity: V_NIHV_NIL28% V_CC(Min)

■ Power down protection is provided on all inputs

■ Low Noise: V_OLP0.8V (Max)

■ Pin and Function Compatible with 74HC32

Ordering Code:

Package

Order Number

Package Description

Number

74VHC32M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHC32MX_NL

(Note 1)

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHC32SJ

M14D

MTC14

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC32MTC

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHC32MTCX_NL

(Note 1)

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74VHC32N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Logic Symbol

Connection Diagram

IEEE/IEC

Truth Table

Pin Descriptions

Pin Names

Description

Inputs

Outputs

A_n, B_n

O_n

DS011518

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

下载PDF

与74VHC32MX-NL相关器件

型号	品牌	获取价格	描述	数据表
74VHC32N	FAIRCHILD	获取价格	Quad 2-Input OR Gate
74VHC32N	TI	获取价格	AHC/VHC SERIES, QUAD 2-INPUT OR GATE, PDIP14, 0.300 INCH, PLASTIC, DIP-14
74VHC32PW	NEXPERIA	获取价格	Quad 2-input OR gate
74VHC32PW-Q100	NEXPERIA	获取价格	Quad 2-input OR gate
74VHC32-Q100	NEXPERIA	获取价格	Quad 2-input OR gate
74VHC32SJ	FAIRCHILD	获取价格	Quad 2-Input OR Gate
74VHC32SJ	TI	获取价格	AHC/VHC SERIES, QUAD 2-INPUT OR GATE, PDSO14, 0.300 INCH, EIAJ, PLASTIC, SOIC-14
74VHC32SJX	FAIRCHILD	获取价格	OR Gate, AHC/VHC Series, 4-Func, 2-Input, CMOS, PDSO14, 5.30 MM, LEAD FREE, EIAJ TYPE2, SO
74VHC32SJX	TI	获取价格	AHC/VHC SERIES, QUAD 2-INPUT OR GATE, PDSO14, 0.300 INCH, EIAJ, PLASTIC, SOIC-14
74VHC32SJX_NL	FAIRCHILD	获取价格	OR Gate, CMOS, PDSO14,