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74VHC245MTCX PDF预览

74VHC245MTCX

更新时间: 2024-11-04 04:48:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
7页 100K
描述
Octal Bidirectional Transceiver with 3-STATE Outputs

74VHC245MTCX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.77
Samacsys Confidence:2Samacsys Status:Released
Samacsys PartID:978826Samacsys Pin Count:20
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:tssop20-4.4 wideSamacsys Released Date:2018-02-22 12:02:29
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:AHC/VHCJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.008 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/5.5 VProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):13.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:4.4 mmBase Number Matches:1

74VHC245MTCX 数据手册

 浏览型号74VHC245MTCX的Datasheet PDF文件第2页浏览型号74VHC245MTCX的Datasheet PDF文件第3页浏览型号74VHC245MTCX的Datasheet PDF文件第4页浏览型号74VHC245MTCX的Datasheet PDF文件第5页浏览型号74VHC245MTCX的Datasheet PDF文件第6页浏览型号74VHC245MTCX的Datasheet PDF文件第7页 
November 1992  
Revised April 2005  
74VHC245  
Octal Bidirectional Transceiver with 3-STATE Outputs  
General Description  
Features  
The VHC245 is an advanced high speed CMOS octal bus  
transceiver fabricated with silicon gate CMOS technology.  
It achieves high speed operation similar to equivalent Bipo-  
lar Schottky TTL while maintaining the CMOS low power  
dissipation. The VHC245 is intended for bidirectional asyn-  
chronous communication between data busses. The direc-  
tion of data transmission is determined by the level of the  
T/R input. The enable input can be used to disable the  
device so that the busses are effectively isolated. All inputs  
are equipped with protection circuits against static dis-  
charge.  
High Speed: tPD 4.0 ns (typ) at VCC 5V  
High Noise Immunity: VNIH VNIL 28% VCC (Min)  
Power Down Protection is provided on all inputs  
Low Noise: VOLP 0.9V (typ)  
Low Power Dissipation:  
ICC  
4 A (Max) @ TA 25 C  
Pin and Function Compatible with 74HC245  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC245M  
74VHC245SJ  
74VHC245MTC  
74VHC245N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
Pin Description  
Inputs  
Outputs  
Pin  
Description  
OE  
L
T/R  
L
Names  
Bus B Data to Bus A  
Bus A Data to Bus B  
HIGH-Z State  
OE  
Output Enable Input  
Transmit/Receive Input  
L
H
T/R  
H
X
H
HIGH Voltage Level  
L
LOW Voltage Level  
X
Immaterial  
A0A7  
B0B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
Any unused bus terminals during HIGH-Z State must be held HIGH or  
LOW.  
© 2005 Fairchild Semiconductor Corporation  
DS011520  
www.fairchildsemi.com  

74VHC245MTCX 替代型号

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