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74VHC245 PDF预览

74VHC245

更新时间: 2024-11-05 22:56:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器
页数 文件大小 规格书
8页 69K
描述
OCTAL BUS TRANSCEIVER 3-STATE

74VHC245 数据手册

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74VHC245  
OCTAL BUS  
TRANSCEIVER (3-STATE)  
PRELIMINARY DATA  
HIGH SPEED:tPD =4.0ns (TYP.) atVCC = 5V  
LOW POWER DISSIPATION:  
ICC =4 µA (MAX.) at TA =25 oC  
HIGH NOISEIMMUNITY:  
VNIH = VNIL =28% VCC (MIN.)  
POWERDOWN PROTECTIONON CONTROL  
INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
M
T
(Micro Package)  
(TSSOPPackage)  
ORDER CODES :  
74VHC245M  
74VHC245T  
used to disable the device so that the busses are  
effectively isolated.  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 2V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES245  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2kV ESD immunity and transient excess  
voltage.  
IT IS PROHIBITED TO APPLY A SIGNAL TO A  
TERMINAL WHEN IT IS IN OUTPUT MODE  
AND WHEN A BUS TERMINAL IS FLOATING  
(HIGH IMPEDANCE STATE) IT IS REQUESTED  
TO FIX THE INPUT LEVEL BY MEANS OF  
EXTERNAL PULL DOWN OR PULL UP  
RESISTOR.  
IMPROVED LATCH-UP IMMUNITY  
LOWNOISEVOLP = 0.9V(Max.)  
DESCRIPTION  
The 74VHC245 is an advanced high-speed  
CMOS OCTAL BUS TRANSCEIVER (3-STATE)  
fabricated with sub-micron silicon gate and  
double-layermetal wiring C2MOS technology.  
This IC is intended for two-way asynchronous  
communication between data busses; the  
direction of data trasmission is determined by the  
level of the DIR input. The enable input G can be  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/8  
June 1999  

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