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74VHC240TTR PDF预览

74VHC240TTR

更新时间: 2024-11-24 20:30:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 66K
描述
AHC/VHC SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, TSSOP-20

74VHC240TTR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.18
Is Samacsys:N控制类型:ENABLE LOW
系列:AHC/VHCJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/5.5 VProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):12.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74VHC240TTR 数据手册

 浏览型号74VHC240TTR的Datasheet PDF文件第2页浏览型号74VHC240TTR的Datasheet PDF文件第3页浏览型号74VHC240TTR的Datasheet PDF文件第4页浏览型号74VHC240TTR的Datasheet PDF文件第5页浏览型号74VHC240TTR的Datasheet PDF文件第6页浏览型号74VHC240TTR的Datasheet PDF文件第7页 
74VHC240  
OCTAL BUS BUFFER  
WITH 3 STATE OUTPUTS (INVERTED)  
HIGH SPEED: t = 3.6ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 8 mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
TUBE  
T & R  
V
CC  
SOP  
74VHC240M  
74VHC240MTR  
74VHC240TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 240  
TSSOP  
IMPROVED LATCH-UP IMMUNITY  
LOW NOISE: V  
= 0.9V (MAX.)  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
OLP  
DESCRIPTION  
The 74VHC240 is an advanced high-speed  
CMOS OCTAL BUS BUFFER (3-STATE)  
fabricated with sub-micron silicon gate and  
2
double-layer metal wiring C MOS technology.  
G output enable governs four BUS BUFFERs.  
This device is designed to be used with 3 state  
memory address drivers, etc.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
June 2001  
1/9  

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