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74VHC21FT

更新时间： 2025-09-04 14:56:15

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74VHC21FT 数据手册

74VHC21FT

CMOS Digital Integrated Circuits Silicon Monolithic

74VHC21FT

1. Functional Description

•

Dual 4-Input AND Gate

2. General

The 74VHC21FT is an advanced high speed CMOS 4-INPUT AND GATE fabricated with silicon gate C2MOS

technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The internal circuit is composed of 4 stages including a buffer output, which provide high noise immunity and

stable output.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages.

3. Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature: Topr = -40 to 125 

(3) High speed: tpd = 3.3 ns (typ.) at VCC = 5.0 V

(4) Low power dissipation: ICC = 2.0 µA (max) at Ta = 25 

(5) High noise immunity: VNIH = VNIL = 28 % VCC (min)

(6) Power down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 21 type.

Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales

representative.

4. Packaging

TSSOP14B

Start of commercial production

2015-01

2016-08-18

Rev.3.0

12 3 4 5 6 7

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