74VHC20TTR

更新时间： 2024-09-15 04:48:03

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
10页	221K
描述
DUAL 4-INPUT NAND GATE

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数据手册
替代型号

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74VHC20TTR 数据手册

74VHC20

DUAL 4-INPUT NAND GATE

■

HIGH SPEED: t = 3.3 ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 2 µA (MAX.) at T =25°C

■

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

■

POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

SOP

TSSOP

|I | = I = 8 mA (MIN)

■

BALANCED PROPAGATION DELAYS:

Table 1: Order Codes

PACKAGE

PLH

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 5.5V

T & R

SOP

74VHC20MTR

74VHC20TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 20

IMPROVED LATCH-UP IMMUNITY

TSSOP

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74VHC20 is an advanced high-speed CMOS

DUAL 4-INPUT NAND GATE fabricated with

sub-micron silicon gate and double-layer metal

wiring C MOS technology.

The internal circuit is composed of 3 stages

including buffer output, which provides high noise

immunity and stable output.

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 4

1/10

November 2004

12 3 4 5 6 7...10

中文翻译

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74VHC20TTR 替代型号

型号	品牌	替代类型	描述	数据表
SN74LV20APWR	TI	功能相似	DUAL 4 INPUT POSITIVE NAND GATE

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