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74VHC132MTC PDF预览

74VHC132MTC

更新时间: 2024-11-23 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
8页 103K
描述
Quad 2-Input NAND Schmitt Trigger

74VHC132MTC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.21
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:11 ns
传播延迟(tpd):17.5 ns认证状态:Not Qualified
施密特触发器:YES座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74VHC132MTC 数据手册

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September 1995  
Revised February 2005  
74VHC132  
Quad 2-Input NAND Schmitt Trigger  
General Description  
Features  
The VHC132 is an advanced high speed CMOS 2-input  
NAND Schmitt Trigger Gate fabricated with silicon gate  
CMOS technology. It achieves the high-speed operation  
similar to Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. Pin configuration and func-  
tion are the same as the VHC00 but the inputs have hyster-  
esis between the positive-going and negative-going input  
thresholds, which are capable of transforming slowly  
changing input signals into sharply defined, jitter-free out-  
put signals. Thus greater noise margin then conventional  
gates is provided. An input protection circuit ensures that  
0V to 7V can be applied to the input pins without regard to  
the supply voltage. This device can be used to interface 5V  
to 3V systems and two supply systems such as battery  
backup. This circuit prevents device destruction due to mis-  
matched supply and input voltages.  
High Speed: tPD 3.9 ns (typ) at VCC 5 V  
Power down protection is provided on all inputs  
Low power dissipation: ICC  
2 A (max) at TA 25 C  
Low noise: VOLP 0.8 V (max)  
Pin and function compatible with 74HC132  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74VHC132M  
74VHC132SJ  
74VHC132MTC  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
MTC14  
MTC14  
74VHC132MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74VHC132N  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012124  
www.fairchildsemi.com  

74VHC132MTC 替代型号

型号 品牌 替代类型 描述 数据表
74VHC132MTCX FAIRCHILD

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Quad 2-Input NAND Schmitt Trigger
MC74VHC132DTR2G ONSEMI

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