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74VHC132FT PDF预览

74VHC132FT

更新时间: 2023-12-06 20:08:32
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
8页 160K
描述
Quad 2-Input/NAND, TSSOP14B

74VHC132FT 数据手册

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74VHC132FT  
CMOS Digital Integrated Circuits Silicon Monolithic  
74VHC132FT  
1. Functional Description  
Quad 2-Input Schmitt NAND Gate  
2. General  
The 74VHC132FT is an advanced high speed CMOS 2-INPUT SCHMITT NAND GATE fabricated with silicon  
gate C2MOS technology.  
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS  
low power dissipation.  
Pin configuration and function are the same as the 74VHC00FT but the inputs have hysteresis and with its  
schmitt trigger function, the 74VHC132FT can be used as a line receivers which will receive slow input signals.  
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply  
voltage. This device can be used to interface 5 to 3 V systems and two supply systems such as battery back up.  
This circuit prevents device destruction due to mismatched supply and input voltages.  
3. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature range: Topr = -40 to 125  
(3) High speed: tpd = 4.9 ns (typ.) at VCC = 5 V  
(4) Low power dissipation: ICC = 2.0 µA (max) at Ta = 25   
(5) Power down protection is provided on all inputs.  
(6) Balanced propagation delays: tPLH tPHL  
(7) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V  
(8) Low noise: VOLP = 0.8 V (max)  
(9) Pin and function compatible with 74ALS132  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
4. Packaging  
TSSOP14B  
Start of commercial production  
2014-03  
©2016 Toshiba Corporation  
2016-08-18  
Rev.3.0  
1

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