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74VHC08SJ PDF预览

74VHC08SJ

更新时间: 2024-11-03 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管
页数 文件大小 规格书
7页 101K
描述
Quad 2-Input AND Gate

74VHC08SJ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOP
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.39
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):14 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mm

74VHC08SJ 数据手册

 浏览型号74VHC08SJ的Datasheet PDF文件第2页浏览型号74VHC08SJ的Datasheet PDF文件第3页浏览型号74VHC08SJ的Datasheet PDF文件第4页浏览型号74VHC08SJ的Datasheet PDF文件第5页浏览型号74VHC08SJ的Datasheet PDF文件第6页浏览型号74VHC08SJ的Datasheet PDF文件第7页 
November 1992  
Revised February 2005  
74VHC08  
Quad 2-Input AND Gate  
General Description  
Features  
The VHC08 is an advanced high speed CMOS 2 Input  
AND Gate fabricated with silicon gate CMOS technology. It  
achieves the high-speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low  
power dissipation.  
High Speed: tPD 4.3 ns (typ) at TA 25 C  
High noise immunity: VNIH VNIL 28% VCC (min)  
Power down protection is provided on all inputs  
Low power dissipation: ICC  
2 A (Max) @ TA 25 C  
The internal circuit is composed of 4 stages including buffer  
output, which provide high noise immunity and stable out-  
put. An input protection circuit insures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery backup. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
Low noise: VOLP 0.8V (max)  
Pin and function compatible with 74HC08  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74VHC08M  
M14A  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74VHC08MX_NL  
(Note 1)  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74VHC08SJ  
M14D  
MTC14  
MTC14  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74VHC08MTC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74VHC08MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74VHC08N  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
A
L
B
L
O
L
Pin Descriptions  
Pin Names  
Description  
Inputs  
Outputs  
L
H
L
L
An, Bn  
On  
H
H
L
H
H
© 2005 Fairchild Semiconductor Corporation  
DS011514  
www.fairchildsemi.com  

74VHC08SJ 替代型号

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