Datasheet > 74VHC04SJ_08

74VHC04SJ_08

更新时间： 2024-11-04 12:23:31

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
10页	299K
描述
Hex Inverter

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数据手册

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74VHC04SJ_08 数据手册

February 2008

74VHC04

Hex Inverter

Features

General Description

■ High Speed: t = 3.8ns (typ.) at V = 5V

The VHC04 is an advanced high speed CMOS Inverter

fabricated with silicon gate CMOS technology. It

achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

■ High noise immunity: V

= V

= 28% V (min.)

NIH

NIL CC

■ Power down protection is provided on all inputs

■ Low Noise: V = 0.4V (typ.)

OLP

■ Low power dissipation: I = 2µA (max.) @ T = 25°C

The internal circuit is composed of 3 stages including

buffer output, which provide high noise immunity and

stable output. An input protection circuit ensures that 0V

to 7V can be applied to the input pins without regard to

the supply voltage. This device can be used to interface

5V to 3V systems and two supply systems such as bat-

tery back up. This circuit prevents device destruction due

to mismatched supply and input voltages.

■ Pin and function compatible with 74HC04

Ordering Information

Package

Order Number

Number

Package Description

74VHC04M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"

Narrow

74VHC04SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC04MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

74VHC04N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

74VHC04 Rev. 1.3.0

www.fairchildsemi.com

12 3 4 5 6 7...10

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