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74VHC03FT PDF预览

74VHC03FT

更新时间: 2024-11-21 14:56:23
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
7页 153K
描述
Quad 2-Input/NAND, TSSOP14B

74VHC03FT 数据手册

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74VHC03FT  
CMOS Digital Integrated Circuits Silicon Monolithic  
74VHC03FT  
1. Functional Description  
Quad 2-Input NAND Gate (Open Drain)  
2. General  
The 74VHC03FT is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS  
technology.  
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS  
low power dissipation.  
Pin configuration and function are the same as the 74VHC00FT. But the 74VHC03FT has, as its outputs, high  
performance MOS N-channel transistors. (OPEN-DRAIN outputs) This device can, therefore, with a suitable  
pull-up resistors, be used in wired-AND, LED driver and other application.  
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply  
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.  
This circuit prevents device destruction due to mismatched supply and input voltages.  
3. Features  
(1) AEC-Q100 (Rev. H) (Note 1)  
(2) Wide operating temperature: Topr = -40 to 125  
(3) High speed: tpd = 3.7 ns (typ.) at VCC = 5.0 V  
(4) Low power dissipation: ICC = 2.0 µA (max) at Ta = 25   
(5) High noise immunity: VNIH = VNIL = 28 % VCC (min)  
(6) Power-down protection is provided on all inputs.  
(7) Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V  
(8) Low noise: VOLP = 0.8 V (max)  
(9) Pin and function compatible with 74HC03  
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales  
representative.  
4. Packaging  
TSSOP14B  
Start of commercial production  
2013-01  
©2016 Toshiba Corporation  
2016-07-07  
Rev.4.0  
1

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