Datasheet > 74VHC03_04

74VHC03_04

更新时间： 2024-11-16 04:48:03

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
11页	236K
描述
QUAD 2-INPUT OPEN DRAIN NAND GATE

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中文翻译

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数据手册

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74VHC03_04 数据手册

74VHC03

QUAD 2-INPUT OPEN DRAIN NAND GATE

■

HIGH SPEED: t = 3.7ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 2 µA (MAX.) at T =25°C

■

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

■

POWER DOWN PROTECTION ON INPUTS

OPERATING VOLTAGE RANGE:

SOP

TSSOP

(OPR) = 2V to 5.5V

■

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 03

IMPROVED LATCH-UP IMMUNITY

Table 1: Order Codes

PACKAGE

■

T & R

LOW NOISE: V

= 0.8V (MAX.)

OLP

SOP

74VHC03MTR

74VHC03TTR

TSSOP

DESCRIPTION

The 74VHC03 is an advanced high-speed CMOS

QUAD 2-INPUT OPEN DRAIN NAND GATE

fabricated with sub-micron silicon gate and

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

double-layer metal wiring C MOS technology.

The internal circuit is composed of 3 stages

including buffer output, which provides high noise

immunity and stable output.

This device can, with an external pull-up resistor,

be used in wired AND configuration. This device

can also be used as a led driver and in any other

application requiring a current sink.

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 4

1/11

November 2004

12 3 4 5 6 7...11

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74VHC03FT	TOSHIBA	获取价格	Quad 2-Input/NAND, TSSOP14B
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74VHC03MTR	STMICROELECTRONICS	获取价格	QUAD 2-INPUT OPEN DRAIN NAND GATE
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