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74VCXH16245/D PDF预览

74VCXH16245/D

更新时间: 2024-11-05 23:24:35
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描述
Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver

74VCXH16245/D 数据手册

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74VCXH16245  
Low-Voltage 1.8/2.5/3.3V  
16-Bit Transceiver  
With 3.6 V–Tolerant Inputs and Outputs  
(3–State, Non–Inverting)  
The 74VCXH16245 is an advanced performance, non–inverting  
16–bit transceiver. It is designed for very high–speed, very low–power  
operation in 1.8 V, 2.5 V or 3.3 V systems.  
http://onsemi.com  
MARKING DIAGRAM  
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate  
voltages it may encounter on either inputs or outputs when interfacing  
to 3.3 V busses. It is guaranteed to be over–voltage tolerant to 3.6 V.  
The VCXH16245 is designed with byte control. It can be operated  
as two separate octals, or with the controls tied together, as a 16–bit  
wide function. The Transmit/Receive (T/Rn) inputs determine the  
direction of data flow through the bi–directional transceiver. Transmit  
(active–HIGH) enables data from A ports to B ports; Receive  
(active–LOW) enables data from B to A ports. The Output Enable  
inputs (OEn), when HIGH, disable both A and B ports by placing them  
in a HIGH Z condition. The data inputs include active bushold  
circuitry, eliminating the need for external pull–up resistors to hold  
unused or floating inputs at a valid logic state.  
48  
48  
74VCXH16245DT  
AWLYYWW  
1
TSSOP–48  
DT SUFFIX  
CASE 1201  
1
= Assembly Location  
WL = Wafer Lot  
YY = Year  
A
WW = Work Week  
Designed for Low Voltage Operation: V = 1.65–3.6 V  
CC  
3.6 V Tolerant Inputs and Outputs  
High Speed Operation: 2.5 ns max for 3.0 to 3.6 V  
3.0 ns max for 2.3 to 2.7 V  
ORDERING INFORMATION  
Device  
Package  
TSSOP  
TSSOP  
Shipping  
39 / Rail  
6.0 ns max for 1.65 to 1.95 V  
74VCXH16245DT  
74VCXH16245DTR  
Static Drive: ±24 mA Drive at 3.0 V  
±18 mA Drive at 2.3 V  
2500 / Reel  
±6 mA Drive at 1.65 V  
Supports Live Insertion and Withdrawal  
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid  
Logic State  
I  
Specification Guarantees High Impedance When V = 0 V  
CC  
OFF  
Near Zero Static Supply Current in All Three Logic States (20 µA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds ±250 mA @ 125°C  
ESD Performance: Human Body Model >2000 V; Machine Model >200 V  
†NOTE: To ensure the outputs activate in the 3–state condition, the output  
enable pins should be connected to V  
through a pull–up resistor. The  
CC  
value of the resistor is determined by the current sinking capability of the  
output connected to the OE pin.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
January, 2001 – Rev. 1  
74VCXH16245/D  

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