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74VCXH16244MTD PDF预览

74VCXH16244MTD

更新时间: 2024-11-05 22:49:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 143K
描述
Low Voltage 16-Bit Buffer/Line Driver with Bushold

74VCXH16244MTD 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.68
控制类型:ENABLE LOW系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm负载电容(CL):30 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:2位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:2.5 ns
传播延迟(tpd):30 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):1.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74VCXH16244MTD 数据手册

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November 1999  
Revised August 2003  
74VCXH16244  
Low Voltage 16-Bit Buffer/Line Driver with Bushold  
General Description  
The VCXH16244 contains sixteen non-inverting buffers  
with 3-STATE outputs to be employed as a memory and  
Features  
1.2V to 3.6V VCC supply operation  
address driver, clock driver, or bus oriented transmitter/  
receiver. The device is nibble (4-bit) controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
3.6V tolerant control inputs and outputs  
Bushold on data inputs eliminating the need for external  
pull-up/pull-down resistors  
The VCXH16244 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
tPD  
2.5 ns max for 3.0V to 3.6V VCC  
The 74VCXH16244 is designed for low voltage (1.2V to  
3.6V) VCC applications with output capability up to 3.6V.  
Static Drive (IOH/IOL  
)
±24 mA @ 3.0V VCC  
The 74VCXH16244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74VCXH16244G  
(Note 1)(Note 2)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
74VCXH16244MTD  
(Note 2)  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 1: Ordering Code “G” indicates Tray.  
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
© 2003 Fairchild Semiconductor Corporation  
DS500230  
www.fairchildsemi.com  

74VCXH16244MTD 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16244TX FAIRCHILD

类似代替

BUFFER/DRIVER|QUAD|4-BIT|AVC/ALVC-CMOS|TSSOP|48PIN|PLASTIC
74ALVCH16244T FAIRCHILD

类似代替

Low Voltage 16-Bit Buffer/Line Driver with Bushold

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