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74VCXH16244DTR PDF预览

74VCXH16244DTR

更新时间: 2024-11-24 04:48:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 231K
描述
Low−Voltage 1.8/2.5/3.3V 16−Bit Buffer

74VCXH16244DTR 数据手册

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74VCXH16244  
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE INV.)  
WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
3.6V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
t
t
= 2.5 ns (MAX.) at V = 3.0 to 3.6V  
PD  
CC  
= 3.0 ns (MAX.) at V = 2.3 to 2.7V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
TSSOP  
TUBE  
|I | = I = 24mA (MIN) at V = 3.0V  
OH  
OL  
CC  
|I | = I = 18mA (MIN) at V = 2.3V  
OH  
OL  
CC  
OPERATING VOLTAGE RANGE:  
(OPR) = 2.3V to 3.6V  
ORDER CODES  
PACKAGE  
V
CC  
T & R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES H16244  
TSSOP  
74VCXH16244TTR  
BUS HOLD PROVIDED ON DATA INPUTS  
LATCH-UP PERFORMANCE EXCEEDS  
300mA (JESD 17)  
PIN CONNECTION  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74VCXH16244 is a low voltage CMOS 16 BIT  
BUS BUFFER (NON INVERTED) fabricated with  
sub-micron silicon gate and five-layer metal wiring  
2
C MOS technology. It is ideal for low power and  
very high speed 2.3 to 3.6V applications; it can be  
interfaced to 3.6V signal environment for both  
inputs and outputs.  
Any nG output control governs four BUS  
BUFFERS. Output Enable input (nG) tied together  
gives full 16-bit operation.  
When nG is LOW, the outputs are on. When nG is  
HIGH, the output are in high impedance state.  
This device is designed to be used with 3 state  
memory address drivers, etc. Bus hold on data  
inputs is provided in order to eliminate the need for  
external pull-up or pull-down resistor.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
February 2003  
1/11  

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