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74VCXF162835MTX PDF预览

74VCXF162835MTX

更新时间： 2024-11-09 03:27:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 78K
描述
Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26з Series Resistors in Outputs

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74VCXF162835MTX 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP56,.3,20
针数：56Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.5
Is Samacsys：N控制类型：ENABLE LOW
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G56
JESD-609代码：e3长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.012 A湿度敏感等级：2
位数：18功能数量：1
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE WITH SERIES RESISTOR输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：3.3 V
Prop。Delay @ Nom-Sup：3.5 ns传播延迟（tpd）：7.4 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

74VCXF162835MTX 数据手册

 浏览型号74VCXF162835MTX的Datasheet PDF文件第2页浏览型号74VCXF162835MTX的Datasheet PDF文件第3页浏览型号74VCXF162835MTX的Datasheet PDF文件第4页浏览型号74VCXF162835MTX的Datasheet PDF文件第5页浏览型号74VCXF162835MTX的Datasheet PDF文件第6页浏览型号74VCXF162835MTX的Datasheet PDF文件第7页 
October 1999  
Revised November 2000  
74VCXF162835  
Low Voltage 18-Bit Universal Bus Driver with 3.6V  
Tolerant Outputs and 26Ω Series Resistors in Outputs  
General Description  
The VCXF162835 low voltage 18-bit universal bus driver  
combines D-type latches and D-type flip-flops to allow data  
flow in transparent, latched and clocked modes.  
Features  
■ Compatible with PC133 DIMM module specifications  
■ 1.65V–3.6V VCC specifications provided  
■ 3.6V tolerant outputs  
Data flow is controlled by output-enable (OE), latch-enable  
(LE), and clock (CLK) inputs. The device operates in  
Transparent Mode when LE is held HIGH. The device  
operates in clocked mode when LE is LOW and CLK is tog-  
gled. Data transfers from the Inputs (In) to Outputs (On) on  
■ 26Ω series resistors in outputs  
■ tPD (CLK to On)  
3.2 ns max for 3.0V to 3.6V VCC  
4.1 ns max for 2.3V to 2.7V VCC  
7.4 ns max for 1.65V to 1.95V VCC  
a Positive Edge Transition of the Clock. When OE is LOW,  
the output data is enabled. When OE is HIGH the output  
port is in a high impedance state.  
■ Power-down high impedance outputs  
■ Static Drive (IOH/IOL  
)
The VCXF162835 is designed with 26Ω series resistors in  
the outputs. This design reduces noise in applications such  
as memory address drivers, clock drivers, and bus trans-  
ceivers/transmitters.  
±12 mA @ 3.0V VCC  
±8 mA @ 2.3V VCC  
±3 mA @ 1.65V VCC  
The 74VCXF162835 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V.  
■ Latchup performance exceeds 300 mA  
■ ESD performance:  
The 74VCXF162835 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model >200V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74VCXF162835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TUBES]  
74VCXF162835MTX MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
(Note 1)  
[TAPE and REEL]  
Note 1: Use this Order Number to receive devices in Tape and Reel.  
© 2000 Fairchild Semiconductor Corporation  
DS500259  
www.fairchildsemi.com  
12345678

中文翻译

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74VCXF162835MTX 替代型号

型号 品牌 替代类型 描述 数据表
74VCXF162835MTD FAIRCHILD

完全替代

 Low Voltage 18-Bit Universal Bus Driver with
74ALVC162835ADGG,1 NXP

功能相似

 74ALVC162835A - 18-bit registered driver with

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