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74VCX86 PDF预览

74VCX86

更新时间: 2024-11-20 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
10页 532K
描述
Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs

74VCX86 数据手册

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July 1999  
Revised February 2005  
74VCX86  
Low Voltage Quad 2-Input Exclusive-OR Gate with  
3.6V Tolerant Inputs and Outputs  
General Description  
The VCX86 contains four 2-input exclusive OR gates. This  
Features  
1.2V to 3.6V VCC supply operation  
product is designed for low voltage (1.2V to 3.6V) VCC  
3.6V tolerant inputs and outputs  
tPD  
applications with I/O compatibility up to 3.6V  
The 74VCX86 is fabricated with an advanced CMOS tech-  
nology to achieve high-speed operation while maintaining  
low CMOS power dissipation.  
3.0 ns max for 3.0V to 3.6V VCC  
Power-off high impedance inputs and outputs  
Static Drive (IOH/IOL  
)
24 mA @ 3.0V VCC  
Uses patented noise/EMI reduction circuitry  
Latchup performance exceeds JEDEC 78 conditions  
ESD performance:  
Human body model 2000V  
Machine model 250V  
Leadless Pb-Free DQFN package  
Ordering Code:  
Order Number Package Number  
Package Description  
74VCX86M  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74VCX86BQX  
(Note 1)  
MLP014A  
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 3.0mm  
74VCX86MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: DQFN package available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS500163  
www.fairchildsemi.com  

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