74VCX16838

更新时间： 2024-09-15 22:45:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
7页	81K
描述
Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs

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中文翻译

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数据手册

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74VCX16838 数据手册

July 1997

Revised July 2000

74VCX16838

Low Voltage 16-Bit Selectable Register/Buffer

with 3.6V Tolerant Inputs and Outputs

General Description

Features

■ Compatible with PC100 and PC133 DIMM module

The VCX16838 contains sixteen non-inverting selectable

buffered or registered paths. The device can be configured

to operate in a registered, or flow through buffer mode by

utilizing the register enable (REGE) and Clock (CP) sig-

nals. The device operates in a 16-bit word wide mode. All

outputs can be placed into 3-State through use of the OE

Pin. These devices are ideally suited for buffered or regis-

tered 168 pin and 200 pin SDRAM DIMM memory mod-

ules.

specifications

■ 1.65V–3.6V V_CCsupply operation

■ 3.6V tolerant inputs and outputs

■ t_PD(CP to O_n)

3.0 ns max for 3.0V to 3.6V V_CC

4.0 ns max for 2.3V to 2.7V V_CC

8.0 ns max for 1.65V to 1.95V V_CC

The 74VCX16838 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O compatibility up to 3.6V.

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

The 74VCX16838 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

■ Static Drive (I_OH/I_OL

)

±24 mA @ 3.0V V_CC

±18 mA @ 2.3V V_CC

±6 mA @ 1.65V V_CC

■ Uses patented noise/EMI reduction circuitry

■ Ideal for SDRAM DIMM modules

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pull-up resistor; the minimum

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Order Number Package Number

Package Description

74VCX16838MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

I₀–I₁₅

O₀–O₁₅

Outputs

Clock Pulse Input

REGE

DS500034

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

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与74VCX16838相关器件

型号	品牌	获取价格	描述	数据表
74VCX16838_05	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74VCX16838MTD	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74VCX16838MTDX	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74VCX16839	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74VCX16839MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
74VCX16839MTDX	ETC	获取价格	Buffer/Flip-Flop
74VCX16839MTDX_NL	FAIRCHILD	获取价格	Bus Driver, ALVC/VCX/A Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, 6.10 MM, MO-153,
74VCX16841	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
74VCX16841_04	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs
74VCX16841MEA	FAIRCHILD	获取价格	Bus Driver, ALVC/VCX/A Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56

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