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74VCX16835

更新时间: 2024-11-24 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器
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8页 79K
描述
Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs

74VCX16835 数据手册

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October 1998  
Revised April 2000  
74VCX16835  
Low Voltage 18-Bit Universal Bus Driver  
with 3.6V Tolerant Inputs and Outputs  
General Description  
The VCX16835 low voltage 18-bit universal bus driver  
combines D-type latches and D-type flip-flops to allow data  
flow in transparent, latched and clocked modes.  
Features  
Compatible with PC100 DIMM module specifications  
1.65V–3.6V VCC specifications provided  
3.6V tolerant inputs and outputs  
tPD (CP to On)  
Data flow is controlled by output-enable (OE), latch-enable  
(LE), and clock (CLK) inputs. The device operates in  
Transparent Mode when LE is held HIGH. The device  
operates in clocked mode when LE is LOW and CLK is tog-  
gled. Data transfers from the Inputs (In) to Ouputs (On) on a  
4.2ns max for 3.0V to 3.6V VCC  
5.2ns max for 2.3V to 2.7V VCC  
9.2ns max for 1.65V to 1.95V VCC  
Positive Edge Transition of the Clock. When OE is LOW,  
the output data is enabled. When OE is HIGH the output  
port is in a high impedance state.  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
Static Drive (IOH/IOL  
)
The 74VCX16835 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V.  
±24mA @ 3.0V  
±18mA @ 2.3V  
±6mA @ 1.65V  
The 74VCX16835 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Latchup performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model >200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC (OE to GND) through a pulldown resistor;  
the minimum value of the resistor is determined by the current sourcing  
capability of the driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74VCX16835MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
© 2000 Fairchild Semiconductor Corporation  
DS500173  
www.fairchildsemi.com  

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