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74VCX16827MTD PDF预览

74VCX16827MTD

更新时间: 2024-11-24 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
7页 58K
描述
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

74VCX16827MTD 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.46
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:2
位数:10功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:2.5 ns传播延迟(tpd):30 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.2 V标称供电电压 (Vsup):1.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mmBase Number Matches:1

74VCX16827MTD 数据手册

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March 1998  
Revised April 1999  
74VCX16827  
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant  
Inputs and Outputs  
General Description  
The VCX16827 contains twenty non-inverting buffers with  
Features  
1.65V–3.6V VCC supply operation  
3-STATE outputs to be employed as  
a memory and  
3.6V tolerant inputs and outputs  
tPD  
address driver, clock driver, or bus oriented transmitter/  
receiver carrying parity. The device is byte controlled. Each  
byte has NOR output enables for maximum control flexibil-  
ity.  
2.5 ns max for 3.0V to 3.6V VCC  
3.0 ns max for 2.3V to 2.7V VCC  
6.0 ns max for 1.65V to 1.95V VCC  
The 74VCX16827 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal (Note 1)  
The 74VCX16827 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Static Drive (IOH/IOL  
)
±24 mA @ 3.0V VCC  
±18 mA @ 2.3V VCC  
±6 mA @ 1.65V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pull-up resistor; the minimum  
CC  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74VCX16827MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OEn  
Description  
Output Enable Input (Active LOW)  
Inputs  
I0–I19  
O0–O19  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS500131.prf  
www.fairchildsemi.com  

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