Datasheet > 74VCX16827MTD

74VCX16827MTD

更新时间： 2024-11-06 06:31:55

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描述
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

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数据手册

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74VCX16827MTD 数据手册

March 1998

Revised October 2002

74VCX16827

Low Voltage 20-Bit Buffer/Line Driver with

3.6V Tolerant Inputs and Outputs

General Description

The VCX16827 contains twenty non-inverting buffers with

Features

■ 1.2V to 3.6V V_CCsupply operation

3-STATE outputs to be employed as

a memory and

■ 3.6V tolerant inputs and outputs

■ t_PD

address driver, clock driver, or bus oriented transmitter/

receiver carrying parity. The device is byte controlled. Each

byte has NOR output enables for maximum control flexibil-

ity.

2.5 ns max for 3.0V to 3.6V V_CC

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

The 74VCX16827 is designed for low voltage (1.2V to

3.6V) V_CCapplications with I/O capability up to 3.6V.

■ Static Drive (I_OH/I_OL

)

The 74VCX16827 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

±24 mA @ 3.0V V_CC

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pull-up resistor; the minimum

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Order Number Package Number

Package Description

74VCX16827MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description

OE_n

Output Enable Input (Active LOW)

I₀–I₁₉

O₀–O₁₉

Inputs

Outputs

DS500131

www.fairchildsemi.com

12 3 4 5 6 7 8

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