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74VCX16821MTDX PDF预览

74VCX16821MTDX

更新时间: 2024-11-05 21:53:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
9页 147K
描述
Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

74VCX16821MTDX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.71
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:14 mm负载电容(CL):30 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:250000000 Hz
最大I(ol):0.024 A湿度敏感等级:2
位数:10功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.5 ns传播延迟(tpd):17.6 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.4 V标称供电电压 (Vsup):1.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

74VCX16821MTDX 数据手册

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March 1998  
Revised October 2004  
74VCX16821  
Low Voltage 20-Bit D-Type Flip-Flops  
with 3.6V Tolerant Inputs and Outputs  
General Description  
The VCX16821 contains twenty non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications.  
Features  
1.4V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
tPD  
The 74VCX16821 is designed for low voltage (1.4V to  
3.6V) VCC applications with I/O compatibility up to 3.6V.  
3.5 ns max for 3.0V to 3.6V VCC  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal (Note 1)  
The 74VCX16821 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Static Drive (IOH/IOL  
)
±24 mA @ 3.0V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to VCC through a pull-up resistor; the minimum  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Descriptions  
74VCX16821MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OEn  
Description  
Output Enable Input (Active LOW)  
CLKn  
Clock Input  
Inputs  
D0D19  
O0O19  
Outputs  
© 2004 Fairchild Semiconductor Corporation  
DS500130  
www.fairchildsemi.com  

74VCX16821MTDX 替代型号

型号 品牌 替代类型 描述 数据表
74VCX16821MTD FAIRCHILD

完全替代

Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
74ALVC16821MTDX FAIRCHILD

类似代替

20-Bit D-Type Flip-Flop
74ALVC16721MTD FAIRCHILD

类似代替

Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs

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