74VCX162838

更新时间： 2024-11-08 22:45:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
7页	80K
描述
Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the Outputs

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74VCX162838 数据手册

August 1997

Revised July 2000

74VCX162838

Low Voltage 16-Bit Selectable Register/Buffer

with 3.6V Tolerant Inputs and Outputs

and 26Ω Series Resistors in the Outputs

General Description

Features

■ Compatible with PC100 and PC133 DIMM module

The VCX162838 contains sixteen non-inverting selectable

buffered or registered paths. The device can be configured

to operate in a registered, or flow through buffer mode by

utilizing the register enable (REGE) and Clock (CP) sig-

nals. The device operates in a 16-bit word wide mode. All

outputs can be placed into 3-State through the use of the

OE pin. These devices are ideally suited for buffered or

registered 168 pin and 200 pin SDRAM DIMM memory

modules.

specifications

■ 1.65V–3.6V V_CCsupply operation

■ 3.6V tolerant inputs and outputs

■ 26Ω series resistors in the outputs

■ t_PD(CP to O_n)

3.9 ns max for 3.0V to 3.6V V_CC

5.4 ns max for 2.3V to 2.7V V_CC

9.8 ns max for 1.65V to 1.95V V_CC

The 74VCX162838 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O compatibility up to 3.6V.

The VCX162838 is also designed with 26Ω series resistors

in the outputs. This design reduces line noise in applica-

tions such as memory address drivers, clock drivers, and

bus transceivers/transmitters.

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

■ Static Drive (I_OH/I_OL

)

±12 mA @ 3.0V V_CC

±8 mA @ 2.3V V_CC

±3 mA @ 1.65V V_CC

The 74VCX162838 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V_CCthrough a pull-up resistor. The minimum

value of the resistor is determined by the current -sourcing capability of the

driver.

Ordering Code:

Ordering Code

Package Number

Package Descriptions

74VCX162838MTD

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

I₀–I₁₅

O₀–O₁₅

Outputs

Clock Pulse Input

REGE

DS500045

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

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与74VCX162838相关器件

型号	品牌	获取价格	描述	数据表
74VCX162838MTD	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer
74VCX162838MTDX	ETC	获取价格	Buffer/Flip-Flop
74VCX162839	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer
74VCX162839_00	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26ohm
74VCX162839MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer
74VCX162839MTDX	ETC	获取价格	Buffer/Flip-Flop
74VCX1632245	STMICROELECTRONICS	获取价格	16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
74VCX1632245LB	STMICROELECTRONICS	获取价格	16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
74VCX1632245LBR	STMICROELECTRONICS	获取价格	16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
74VCX1632245TB	STMICROELECTRONICS	获取价格	16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR

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