74VCX162827MTDX_NL

更新时间： 2024-11-24 13:04:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		驱动器
页数	文件大小	规格书
7页	58K
描述
暂无描述

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74VCX162827MTDX_NL 数据手册

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第2页

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第3页

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第4页

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第5页

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第6页

浏览型号74VCX162827MTDX_NL的Datasheet PDF文件第7页

March 1998

Revised April 1999

74VCX162827

Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant

Inputs and Outputs and 26Ω Series Resistors in the

Outputs

General Description

The VCX162827 contains twenty non-inverting buffers with

Features

■ 1.65V–3.6V V_CCsupply operation

3-STATE outputs to be employed as

a memory and

■ 3.6V tolerant inputs and outputs

■ 26Ω series resistors in outputs

■ t_PD

address driver, clock driver, or bus oriented transmitter/

receiver. The device is byte controlled. Each byte has NOR

output enables for maximum control flexibility.

The 74VCX162827 is designed for low voltage (1.65V to

3.6V) V_CCapplications with I/O capability up to 3.6V. The

3.4 ns max for 3.0V to 3.6V V_CC

4.1 ns max for 2.3V to 2.7V V_CC

8.2 ns max for 1.65V to 1.95V V_CC

VCX162827 is also designed with 26Ω resistors in the out-

puts.

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

The 74VCX162827 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

■ Static Drive (I_OH/I_OL

)

±12 mA @ 3.0V V_CC

±8 mA @ 2.3V V_CC

±3 mA @ 1.65V V_CC

■ Uses patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 300 mA

■ ESD performance:

Human body model > 2000V

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to V

through a pull-up resistor; the minimum

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Order Number

Package Number

Package Description

74VCX162827MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

OE_n

Description

Output Enable Input (Active LOW)

Inputs

I₀–I₁₉

O₀–O₁₉

Outputs

DS500138.prf

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

下载PDF

与74VCX162827MTDX_NL相关器件

型号	品牌	获取价格	描述	数据表
74VCX162835	FAIRCHILD	获取价格	Low Voltage 18-Bit Universal Bus Driver with
74VCX162835MTD	FAIRCHILD	获取价格	Low Voltage 18-Bit Universal Bus Driver with
74VCX162835MTDX	ETC	获取价格	18-Bit Buffer/Driver
74VCX162838	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer
74VCX162838MTD	FAIRCHILD	获取价格	Low Voltage 16-Bit Selectable Register/Buffer
74VCX162838MTDX	ETC	获取价格	Buffer/Flip-Flop
74VCX162839	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer
74VCX162839_00	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26ohm
74VCX162839MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit Selectable Register/Buffer
74VCX162839MTDX	ETC	获取价格	Buffer/Flip-Flop